Skip to content

Commit b0bd6c9

Browse files
committed
Update lit checks after rebase
1 parent 22adc7a commit b0bd6c9

File tree

1 file changed

+68
-80
lines changed

1 file changed

+68
-80
lines changed

llvm/test/CodeGen/NVPTX/i128.ll

Lines changed: 68 additions & 80 deletions
Original file line numberDiff line numberDiff line change
@@ -6,7 +6,7 @@ define i128 @srem_i128(i128 %lhs, i128 %rhs) {
66
; CHECK-LABEL: srem_i128(
77
; CHECK: {
88
; CHECK-NEXT: .reg .pred %p<19>;
9-
; CHECK-NEXT: .reg .b32 %r<20>;
9+
; CHECK-NEXT: .reg .b32 %r<16>;
1010
; CHECK-NEXT: .reg .b64 %rd<127>;
1111
; CHECK-EMPTY:
1212
; CHECK-NEXT: // %bb.0: // %_udiv-special-cases
@@ -67,32 +67,29 @@ define i128 @srem_i128(i128 %lhs, i128 %rhs) {
6767
; CHECK-NEXT: or.b64 %rd72, %rd119, %rd120;
6868
; CHECK-NEXT: setp.eq.s64 %p15, %rd72, 0;
6969
; CHECK-NEXT: cvt.u32.u64 %r9, %rd66;
70-
; CHECK-NEXT: mov.b32 %r10, 127;
71-
; CHECK-NEXT: sub.s32 %r11, %r10, %r9;
72-
; CHECK-NEXT: shl.b64 %rd73, %rd4, %r11;
73-
; CHECK-NEXT: mov.b32 %r12, 64;
74-
; CHECK-NEXT: sub.s32 %r13, %r12, %r11;
75-
; CHECK-NEXT: shr.u64 %rd74, %rd3, %r13;
70+
; CHECK-NEXT: sub.s32 %r10, 127, %r9;
71+
; CHECK-NEXT: shl.b64 %rd73, %rd4, %r10;
72+
; CHECK-NEXT: sub.s32 %r11, 64, %r10;
73+
; CHECK-NEXT: shr.u64 %rd74, %rd3, %r11;
7674
; CHECK-NEXT: or.b64 %rd75, %rd73, %rd74;
77-
; CHECK-NEXT: mov.b32 %r14, 63;
78-
; CHECK-NEXT: sub.s32 %r15, %r14, %r9;
79-
; CHECK-NEXT: shl.b64 %rd76, %rd3, %r15;
80-
; CHECK-NEXT: setp.gt.s32 %p16, %r11, 63;
75+
; CHECK-NEXT: sub.s32 %r12, 63, %r9;
76+
; CHECK-NEXT: shl.b64 %rd76, %rd3, %r12;
77+
; CHECK-NEXT: setp.gt.s32 %p16, %r10, 63;
8178
; CHECK-NEXT: selp.b64 %rd124, %rd76, %rd75, %p16;
82-
; CHECK-NEXT: shl.b64 %rd123, %rd3, %r11;
79+
; CHECK-NEXT: shl.b64 %rd123, %rd3, %r10;
8380
; CHECK-NEXT: mov.u64 %rd114, %rd117;
8481
; CHECK-NEXT: @%p15 bra $L__BB0_4;
8582
; CHECK-NEXT: // %bb.1: // %udiv-preheader
86-
; CHECK-NEXT: cvt.u32.u64 %r16, %rd119;
87-
; CHECK-NEXT: shr.u64 %rd79, %rd3, %r16;
88-
; CHECK-NEXT: sub.s32 %r18, %r12, %r16;
89-
; CHECK-NEXT: shl.b64 %rd80, %rd4, %r18;
83+
; CHECK-NEXT: cvt.u32.u64 %r13, %rd119;
84+
; CHECK-NEXT: shr.u64 %rd79, %rd3, %r13;
85+
; CHECK-NEXT: sub.s32 %r14, 64, %r13;
86+
; CHECK-NEXT: shl.b64 %rd80, %rd4, %r14;
9087
; CHECK-NEXT: or.b64 %rd81, %rd79, %rd80;
91-
; CHECK-NEXT: add.s32 %r19, %r16, -64;
92-
; CHECK-NEXT: shr.u64 %rd82, %rd4, %r19;
93-
; CHECK-NEXT: setp.gt.s32 %p17, %r16, 63;
88+
; CHECK-NEXT: add.s32 %r15, %r13, -64;
89+
; CHECK-NEXT: shr.u64 %rd82, %rd4, %r15;
90+
; CHECK-NEXT: setp.gt.s32 %p17, %r13, 63;
9491
; CHECK-NEXT: selp.b64 %rd121, %rd82, %rd81, %p17;
95-
; CHECK-NEXT: shr.u64 %rd122, %rd4, %r16;
92+
; CHECK-NEXT: shr.u64 %rd122, %rd4, %r13;
9693
; CHECK-NEXT: add.cc.s64 %rd35, %rd5, -1;
9794
; CHECK-NEXT: addc.cc.s64 %rd36, %rd6, -1;
9895
; CHECK-NEXT: mov.b64 %rd114, 0;
@@ -153,7 +150,7 @@ define i128 @urem_i128(i128 %lhs, i128 %rhs) {
153150
; CHECK-LABEL: urem_i128(
154151
; CHECK: {
155152
; CHECK-NEXT: .reg .pred %p<17>;
156-
; CHECK-NEXT: .reg .b32 %r<20>;
153+
; CHECK-NEXT: .reg .b32 %r<16>;
157154
; CHECK-NEXT: .reg .b64 %rd<113>;
158155
; CHECK-EMPTY:
159156
; CHECK-NEXT: // %bb.0: // %_udiv-special-cases
@@ -203,32 +200,29 @@ define i128 @urem_i128(i128 %lhs, i128 %rhs) {
203200
; CHECK-NEXT: or.b64 %rd62, %rd105, %rd106;
204201
; CHECK-NEXT: setp.eq.s64 %p13, %rd62, 0;
205202
; CHECK-NEXT: cvt.u32.u64 %r9, %rd56;
206-
; CHECK-NEXT: mov.b32 %r10, 127;
207-
; CHECK-NEXT: sub.s32 %r11, %r10, %r9;
208-
; CHECK-NEXT: shl.b64 %rd63, %rd42, %r11;
209-
; CHECK-NEXT: mov.b32 %r12, 64;
210-
; CHECK-NEXT: sub.s32 %r13, %r12, %r11;
211-
; CHECK-NEXT: shr.u64 %rd64, %rd41, %r13;
203+
; CHECK-NEXT: sub.s32 %r10, 127, %r9;
204+
; CHECK-NEXT: shl.b64 %rd63, %rd42, %r10;
205+
; CHECK-NEXT: sub.s32 %r11, 64, %r10;
206+
; CHECK-NEXT: shr.u64 %rd64, %rd41, %r11;
212207
; CHECK-NEXT: or.b64 %rd65, %rd63, %rd64;
213-
; CHECK-NEXT: mov.b32 %r14, 63;
214-
; CHECK-NEXT: sub.s32 %r15, %r14, %r9;
215-
; CHECK-NEXT: shl.b64 %rd66, %rd41, %r15;
216-
; CHECK-NEXT: setp.gt.s32 %p14, %r11, 63;
208+
; CHECK-NEXT: sub.s32 %r12, 63, %r9;
209+
; CHECK-NEXT: shl.b64 %rd66, %rd41, %r12;
210+
; CHECK-NEXT: setp.gt.s32 %p14, %r10, 63;
217211
; CHECK-NEXT: selp.b64 %rd110, %rd66, %rd65, %p14;
218-
; CHECK-NEXT: shl.b64 %rd109, %rd41, %r11;
212+
; CHECK-NEXT: shl.b64 %rd109, %rd41, %r10;
219213
; CHECK-NEXT: mov.u64 %rd100, %rd103;
220214
; CHECK-NEXT: @%p13 bra $L__BB1_4;
221215
; CHECK-NEXT: // %bb.1: // %udiv-preheader
222-
; CHECK-NEXT: cvt.u32.u64 %r16, %rd105;
223-
; CHECK-NEXT: shr.u64 %rd69, %rd41, %r16;
224-
; CHECK-NEXT: sub.s32 %r18, %r12, %r16;
225-
; CHECK-NEXT: shl.b64 %rd70, %rd42, %r18;
216+
; CHECK-NEXT: cvt.u32.u64 %r13, %rd105;
217+
; CHECK-NEXT: shr.u64 %rd69, %rd41, %r13;
218+
; CHECK-NEXT: sub.s32 %r14, 64, %r13;
219+
; CHECK-NEXT: shl.b64 %rd70, %rd42, %r14;
226220
; CHECK-NEXT: or.b64 %rd71, %rd69, %rd70;
227-
; CHECK-NEXT: add.s32 %r19, %r16, -64;
228-
; CHECK-NEXT: shr.u64 %rd72, %rd42, %r19;
229-
; CHECK-NEXT: setp.gt.s32 %p15, %r16, 63;
221+
; CHECK-NEXT: add.s32 %r15, %r13, -64;
222+
; CHECK-NEXT: shr.u64 %rd72, %rd42, %r15;
223+
; CHECK-NEXT: setp.gt.s32 %p15, %r13, 63;
230224
; CHECK-NEXT: selp.b64 %rd107, %rd72, %rd71, %p15;
231-
; CHECK-NEXT: shr.u64 %rd108, %rd42, %r16;
225+
; CHECK-NEXT: shr.u64 %rd108, %rd42, %r13;
232226
; CHECK-NEXT: add.cc.s64 %rd33, %rd3, -1;
233227
; CHECK-NEXT: addc.cc.s64 %rd34, %rd4, -1;
234228
; CHECK-NEXT: mov.b64 %rd100, 0;
@@ -320,7 +314,7 @@ define i128 @sdiv_i128(i128 %lhs, i128 %rhs) {
320314
; CHECK-LABEL: sdiv_i128(
321315
; CHECK: {
322316
; CHECK-NEXT: .reg .pred %p<19>;
323-
; CHECK-NEXT: .reg .b32 %r<20>;
317+
; CHECK-NEXT: .reg .b32 %r<16>;
324318
; CHECK-NEXT: .reg .b64 %rd<122>;
325319
; CHECK-EMPTY:
326320
; CHECK-NEXT: // %bb.0: // %_udiv-special-cases
@@ -382,32 +376,29 @@ define i128 @sdiv_i128(i128 %lhs, i128 %rhs) {
382376
; CHECK-NEXT: or.b64 %rd73, %rd114, %rd115;
383377
; CHECK-NEXT: setp.eq.s64 %p15, %rd73, 0;
384378
; CHECK-NEXT: cvt.u32.u64 %r9, %rd67;
385-
; CHECK-NEXT: mov.b32 %r10, 127;
386-
; CHECK-NEXT: sub.s32 %r11, %r10, %r9;
387-
; CHECK-NEXT: shl.b64 %rd74, %rd2, %r11;
388-
; CHECK-NEXT: mov.b32 %r12, 64;
389-
; CHECK-NEXT: sub.s32 %r13, %r12, %r11;
390-
; CHECK-NEXT: shr.u64 %rd75, %rd1, %r13;
379+
; CHECK-NEXT: sub.s32 %r10, 127, %r9;
380+
; CHECK-NEXT: shl.b64 %rd74, %rd2, %r10;
381+
; CHECK-NEXT: sub.s32 %r11, 64, %r10;
382+
; CHECK-NEXT: shr.u64 %rd75, %rd1, %r11;
391383
; CHECK-NEXT: or.b64 %rd76, %rd74, %rd75;
392-
; CHECK-NEXT: mov.b32 %r14, 63;
393-
; CHECK-NEXT: sub.s32 %r15, %r14, %r9;
394-
; CHECK-NEXT: shl.b64 %rd77, %rd1, %r15;
395-
; CHECK-NEXT: setp.gt.s32 %p16, %r11, 63;
384+
; CHECK-NEXT: sub.s32 %r12, 63, %r9;
385+
; CHECK-NEXT: shl.b64 %rd77, %rd1, %r12;
386+
; CHECK-NEXT: setp.gt.s32 %p16, %r10, 63;
396387
; CHECK-NEXT: selp.b64 %rd119, %rd77, %rd76, %p16;
397-
; CHECK-NEXT: shl.b64 %rd118, %rd1, %r11;
388+
; CHECK-NEXT: shl.b64 %rd118, %rd1, %r10;
398389
; CHECK-NEXT: mov.u64 %rd109, %rd112;
399390
; CHECK-NEXT: @%p15 bra $L__BB4_4;
400391
; CHECK-NEXT: // %bb.1: // %udiv-preheader
401-
; CHECK-NEXT: cvt.u32.u64 %r16, %rd114;
402-
; CHECK-NEXT: shr.u64 %rd80, %rd1, %r16;
403-
; CHECK-NEXT: sub.s32 %r18, %r12, %r16;
404-
; CHECK-NEXT: shl.b64 %rd81, %rd2, %r18;
392+
; CHECK-NEXT: cvt.u32.u64 %r13, %rd114;
393+
; CHECK-NEXT: shr.u64 %rd80, %rd1, %r13;
394+
; CHECK-NEXT: sub.s32 %r14, 64, %r13;
395+
; CHECK-NEXT: shl.b64 %rd81, %rd2, %r14;
405396
; CHECK-NEXT: or.b64 %rd82, %rd80, %rd81;
406-
; CHECK-NEXT: add.s32 %r19, %r16, -64;
407-
; CHECK-NEXT: shr.u64 %rd83, %rd2, %r19;
408-
; CHECK-NEXT: setp.gt.s32 %p17, %r16, 63;
397+
; CHECK-NEXT: add.s32 %r15, %r13, -64;
398+
; CHECK-NEXT: shr.u64 %rd83, %rd2, %r15;
399+
; CHECK-NEXT: setp.gt.s32 %p17, %r13, 63;
409400
; CHECK-NEXT: selp.b64 %rd116, %rd83, %rd82, %p17;
410-
; CHECK-NEXT: shr.u64 %rd117, %rd2, %r16;
401+
; CHECK-NEXT: shr.u64 %rd117, %rd2, %r13;
411402
; CHECK-NEXT: add.cc.s64 %rd35, %rd3, -1;
412403
; CHECK-NEXT: addc.cc.s64 %rd36, %rd4, -1;
413404
; CHECK-NEXT: mov.b64 %rd109, 0;
@@ -462,7 +453,7 @@ define i128 @udiv_i128(i128 %lhs, i128 %rhs) {
462453
; CHECK-LABEL: udiv_i128(
463454
; CHECK: {
464455
; CHECK-NEXT: .reg .pred %p<17>;
465-
; CHECK-NEXT: .reg .b32 %r<20>;
456+
; CHECK-NEXT: .reg .b32 %r<16>;
466457
; CHECK-NEXT: .reg .b64 %rd<107>;
467458
; CHECK-EMPTY:
468459
; CHECK-NEXT: // %bb.0: // %_udiv-special-cases
@@ -512,32 +503,29 @@ define i128 @udiv_i128(i128 %lhs, i128 %rhs) {
512503
; CHECK-NEXT: or.b64 %rd62, %rd99, %rd100;
513504
; CHECK-NEXT: setp.eq.s64 %p13, %rd62, 0;
514505
; CHECK-NEXT: cvt.u32.u64 %r9, %rd56;
515-
; CHECK-NEXT: mov.b32 %r10, 127;
516-
; CHECK-NEXT: sub.s32 %r11, %r10, %r9;
517-
; CHECK-NEXT: shl.b64 %rd63, %rd42, %r11;
518-
; CHECK-NEXT: mov.b32 %r12, 64;
519-
; CHECK-NEXT: sub.s32 %r13, %r12, %r11;
520-
; CHECK-NEXT: shr.u64 %rd64, %rd41, %r13;
506+
; CHECK-NEXT: sub.s32 %r10, 127, %r9;
507+
; CHECK-NEXT: shl.b64 %rd63, %rd42, %r10;
508+
; CHECK-NEXT: sub.s32 %r11, 64, %r10;
509+
; CHECK-NEXT: shr.u64 %rd64, %rd41, %r11;
521510
; CHECK-NEXT: or.b64 %rd65, %rd63, %rd64;
522-
; CHECK-NEXT: mov.b32 %r14, 63;
523-
; CHECK-NEXT: sub.s32 %r15, %r14, %r9;
524-
; CHECK-NEXT: shl.b64 %rd66, %rd41, %r15;
525-
; CHECK-NEXT: setp.gt.s32 %p14, %r11, 63;
511+
; CHECK-NEXT: sub.s32 %r12, 63, %r9;
512+
; CHECK-NEXT: shl.b64 %rd66, %rd41, %r12;
513+
; CHECK-NEXT: setp.gt.s32 %p14, %r10, 63;
526514
; CHECK-NEXT: selp.b64 %rd104, %rd66, %rd65, %p14;
527-
; CHECK-NEXT: shl.b64 %rd103, %rd41, %r11;
515+
; CHECK-NEXT: shl.b64 %rd103, %rd41, %r10;
528516
; CHECK-NEXT: mov.u64 %rd94, %rd97;
529517
; CHECK-NEXT: @%p13 bra $L__BB5_4;
530518
; CHECK-NEXT: // %bb.1: // %udiv-preheader
531-
; CHECK-NEXT: cvt.u32.u64 %r16, %rd99;
532-
; CHECK-NEXT: shr.u64 %rd69, %rd41, %r16;
533-
; CHECK-NEXT: sub.s32 %r18, %r12, %r16;
534-
; CHECK-NEXT: shl.b64 %rd70, %rd42, %r18;
519+
; CHECK-NEXT: cvt.u32.u64 %r13, %rd99;
520+
; CHECK-NEXT: shr.u64 %rd69, %rd41, %r13;
521+
; CHECK-NEXT: sub.s32 %r14, 64, %r13;
522+
; CHECK-NEXT: shl.b64 %rd70, %rd42, %r14;
535523
; CHECK-NEXT: or.b64 %rd71, %rd69, %rd70;
536-
; CHECK-NEXT: add.s32 %r19, %r16, -64;
537-
; CHECK-NEXT: shr.u64 %rd72, %rd42, %r19;
538-
; CHECK-NEXT: setp.gt.s32 %p15, %r16, 63;
524+
; CHECK-NEXT: add.s32 %r15, %r13, -64;
525+
; CHECK-NEXT: shr.u64 %rd72, %rd42, %r15;
526+
; CHECK-NEXT: setp.gt.s32 %p15, %r13, 63;
539527
; CHECK-NEXT: selp.b64 %rd101, %rd72, %rd71, %p15;
540-
; CHECK-NEXT: shr.u64 %rd102, %rd42, %r16;
528+
; CHECK-NEXT: shr.u64 %rd102, %rd42, %r13;
541529
; CHECK-NEXT: add.cc.s64 %rd33, %rd43, -1;
542530
; CHECK-NEXT: addc.cc.s64 %rd34, %rd44, -1;
543531
; CHECK-NEXT: mov.b64 %rd94, 0;

0 commit comments

Comments
 (0)