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[AArch64] Fix sched model of Neoverse N2
* fix write order of "Load vector reg, immed post-index" * fix a typo
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+30
-29
lines changed

2 files changed

+30
-29
lines changed

‎llvm/lib/Target/AArch64/AArch64SchedNeoverseN2.td

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -836,9 +836,11 @@ def : InstRW<[N2Write_3c_1V], (instregex "^FCVT[AMNPZ][SU][SU][WX][HSD]r$")>;
836836
def : SchedAlias<WriteFCvt, N2Write_3c_1V0>;
837837

838838
// FP move, immed
839-
// FP move, register
840839
def : SchedAlias<WriteFImm, N2Write_2c_1V>;
841840

841+
// FP move, register
842+
def : InstRW<[N2Write_2c_1V], (instrs FMOVHr, FMOVSr, FMOVDr)>;
843+
842844
// FP transfer, from gen to low half of vec reg
843845
def : InstRW<[N2Write_3c_1M0], (instrs FMOVWHr, FMOVXHr, FMOVWSr, FMOVXDr,
844846
FMOVHWr, FMOVHXr, FMOVSWr, FMOVDXr)>;
@@ -858,9 +860,8 @@ def : InstRW<[N2Write_6c_1L], (instregex "^LDR[SDQ]l$",
858860
"^LDUR[BHSDQ]i$")>;
859861

860862
// Load vector reg, immed post-index
861-
def : InstRW<[N2Write_6c_1I_1L, WriteI], (instregex "^LDR[BHSDQ]post$")>;
862863
// Load vector reg, immed pre-index
863-
def : InstRW<[WriteAdr, N2Write_6c_1I_1L], (instregex "^LDR[BHSDQ]pre$")>;
864+
def : InstRW<[WriteAdr, N2Write_6c_1I_1L], (instregex "^LDR[BHSDQ](post|pre)$")>;
864865

865866
// Load vector reg, unsigned immed
866867
def : InstRW<[N2Write_6c_1L], (instregex "^LDR[BHSDQ]ui$")>;
@@ -1119,7 +1120,7 @@ def : InstRW<[N2Write_5c_1V], (instregex "^FMLALv", "^FMLSLv")>;
11191120
// ASIMD FP round, D-form F32 and Q-form F64
11201121
def : InstRW<[N2Write_3c_1V0],
11211122
(instregex "^FRINT[AIMNPXZ]v2f(32|64)$",
1122-
"^FRINT[32|64)[XZ]v2f(32|64)$")>;
1123+
"^FRINT(32|64)[XZ]v2f(32|64)$")>;
11231124

11241125
// ASIMD FP round, D-form F16 and Q-form F32
11251126
def : InstRW<[N2Write_4c_2V0],

‎llvm/test/tools/llvm-mca/AArch64/Neoverse/N2-writeback.s

Lines changed: 25 additions & 25 deletions
Original file line numberDiff line numberDiff line change
@@ -3298,28 +3298,28 @@ add x0, x27, 1
32983298

32993299
# CHECK: Iterations: 100
33003300
# CHECK-NEXT: Instructions: 1000
3301-
# CHECK-NEXT: Total Cycles: 3004
3301+
# CHECK-NEXT: Total Cycles: 508
33023302
# CHECK-NEXT: Total uOps: 2000
33033303

33043304
# CHECK: Dispatch Width: 10
3305-
# CHECK-NEXT: uOps Per Cycle: 0.67
3306-
# CHECK-NEXT: IPC: 0.33
3305+
# CHECK-NEXT: uOps Per Cycle: 3.94
3306+
# CHECK-NEXT: IPC: 1.97
33073307
# CHECK-NEXT: Block RThroughput: 3.8
33083308

33093309
# CHECK: Timeline view:
3310-
# CHECK-NEXT: 0123456789 0123
3311-
# CHECK-NEXT: Index 0123456789 0123456789
3310+
# CHECK-NEXT: 012
3311+
# CHECK-NEXT: Index 0123456789
33123312

3313-
# CHECK: [0,0] DeeeeeeER . . . . . . ldr b1, [x27], #254
3314-
# CHECK-NEXT: [0,1] D======eER. . . . . . add x0, x27, #1
3315-
# CHECK-NEXT: [0,2] D======eeeeeeER. . . . . ldr h1, [x27], #254
3316-
# CHECK-NEXT: [0,3] D============eER . . . . add x0, x27, #1
3317-
# CHECK-NEXT: [0,4] .D===========eeeeeeER . . . ldr s1, [x27], #254
3318-
# CHECK-NEXT: [0,5] .D=================eER . . . add x0, x27, #1
3319-
# CHECK-NEXT: [0,6] .D=================eeeeeeER . . ldr d1, [x27], #254
3320-
# CHECK-NEXT: [0,7] .D=======================eER . . add x0, x27, #1
3321-
# CHECK-NEXT: [0,8] . D======================eeeeeeER. ldr q1, [x27], #254
3322-
# CHECK-NEXT: [0,9] . D============================eER add x0, x27, #1
3313+
# CHECK: [0,0] DeeeeeeER . . ldr b1, [x27], #254
3314+
# CHECK-NEXT: [0,1] D=eE----R . . add x0, x27, #1
3315+
# CHECK-NEXT: [0,2] D=eeeeeeER. . ldr h1, [x27], #254
3316+
# CHECK-NEXT: [0,3] D==eE----R. . add x0, x27, #1
3317+
# CHECK-NEXT: [0,4] .D=eeeeeeER . ldr s1, [x27], #254
3318+
# CHECK-NEXT: [0,5] .D==eE----R . add x0, x27, #1
3319+
# CHECK-NEXT: [0,6] .D==eeeeeeER. ldr d1, [x27], #254
3320+
# CHECK-NEXT: [0,7] .D===eE----R. add x0, x27, #1
3321+
# CHECK-NEXT: [0,8] . D==eeeeeeER ldr q1, [x27], #254
3322+
# CHECK-NEXT: [0,9] . D===eE----R add x0, x27, #1
33233323

33243324
# CHECK: Average Wait times (based on the timeline view):
33253325
# CHECK-NEXT: [0]: Executions
@@ -3329,16 +3329,16 @@ add x0, x27, 1
33293329

33303330
# CHECK: [0] [1] [2] [3]
33313331
# CHECK-NEXT: 0. 1 1.0 1.0 0.0 ldr b1, [x27], #254
3332-
# CHECK-NEXT: 1. 1 7.0 0.0 0.0 add x0, x27, #1
3333-
# CHECK-NEXT: 2. 1 7.0 0.0 0.0 ldr h1, [x27], #254
3334-
# CHECK-NEXT: 3. 1 13.0 0.0 0.0 add x0, x27, #1
3335-
# CHECK-NEXT: 4. 1 12.0 0.0 0.0 ldr s1, [x27], #254
3336-
# CHECK-NEXT: 5. 1 18.0 0.0 0.0 add x0, x27, #1
3337-
# CHECK-NEXT: 6. 1 18.0 0.0 0.0 ldr d1, [x27], #254
3338-
# CHECK-NEXT: 7. 1 24.0 0.0 0.0 add x0, x27, #1
3339-
# CHECK-NEXT: 8. 1 23.0 0.0 0.0 ldr q1, [x27], #254
3340-
# CHECK-NEXT: 9. 1 29.0 0.0 0.0 add x0, x27, #1
3341-
# CHECK-NEXT: 1 15.2 0.1 0.0 <total>
3332+
# CHECK-NEXT: 1. 1 2.0 0.0 4.0 add x0, x27, #1
3333+
# CHECK-NEXT: 2. 1 2.0 0.0 0.0 ldr h1, [x27], #254
3334+
# CHECK-NEXT: 3. 1 3.0 0.0 4.0 add x0, x27, #1
3335+
# CHECK-NEXT: 4. 1 2.0 0.0 0.0 ldr s1, [x27], #254
3336+
# CHECK-NEXT: 5. 1 3.0 0.0 4.0 add x0, x27, #1
3337+
# CHECK-NEXT: 6. 1 3.0 0.0 0.0 ldr d1, [x27], #254
3338+
# CHECK-NEXT: 7. 1 4.0 0.0 4.0 add x0, x27, #1
3339+
# CHECK-NEXT: 8. 1 3.0 0.0 0.0 ldr q1, [x27], #254
3340+
# CHECK-NEXT: 9. 1 4.0 0.0 4.0 add x0, x27, #1
3341+
# CHECK-NEXT: 1 2.7 0.1 2.0 <total>
33423342

33433343
# CHECK: [47] Code Region - G48
33443344

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