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gonglingqinSixWeining
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[LoongArch] Add earlyclobber of destination register to atomic instructions
If the AM* atomic memory access instruction has the same register number as rd and rj, the execution will trigger an Instruction Non-defined Exception. If the AM* atomic memory access instruction has the same register number as rd and rk, the execution result is uncertain. Reference: https://github.com/loongson/LoongArch-Documentation Differential Revision: https://reviews.llvm.org/D135641
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2 files changed

+39
-27
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‎llvm/lib/Target/LoongArch/LoongArchInstrInfo.td

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -339,7 +339,7 @@ class STORE_2RI14<bits<8> op, string opstr>
339339
"$rd, $rj, $imm14">;
340340
} // mayStore = 1
341341

342-
let mayLoad = 1, mayStore = 1 in
342+
let mayLoad = 1, mayStore = 1, Constraints = "@earlyclobber $rd" in
343343
class AM_3R<bits<17> op, string opstr>
344344
: Fmt3R<op, (outs GPR:$rd), (ins GPR:$rk, GPR:$rj), opstr, "$rd, $rk, $rj">;
345345

‎llvm/test/CodeGen/LoongArch/ir-instruction/atomicrmw.ll

Lines changed: 38 additions & 26 deletions
Original file line numberDiff line numberDiff line change
@@ -119,7 +119,8 @@ define i32 @atomicrmw_xchg_i32_acquire(ptr %a, i32 %b) nounwind {
119119
;
120120
; LA64-LABEL: atomicrmw_xchg_i32_acquire:
121121
; LA64: # %bb.0:
122-
; LA64-NEXT: amswap_db.w $a0, $a1, $a0
122+
; LA64-NEXT: amswap_db.w $a2, $a1, $a0
123+
; LA64-NEXT: move $a0, $a2
123124
; LA64-NEXT: ret
124125
%1 = atomicrmw xchg ptr %a, i32 %b acquire
125126
ret i32 %1
@@ -138,7 +139,8 @@ define i64 @atomicrmw_xchg_i64_acquire(ptr %a, i64 %b) nounwind {
138139
;
139140
; LA64-LABEL: atomicrmw_xchg_i64_acquire:
140141
; LA64: # %bb.0:
141-
; LA64-NEXT: amswap_db.d $a0, $a1, $a0
142+
; LA64-NEXT: amswap_db.d $a2, $a1, $a0
143+
; LA64-NEXT: move $a0, $a2
142144
; LA64-NEXT: ret
143145
%1 = atomicrmw xchg ptr %a, i64 %b acquire
144146
ret i64 %1
@@ -261,7 +263,8 @@ define i32 @atomicrmw_add_i32_acquire(ptr %a, i32 %b) nounwind {
261263
;
262264
; LA64-LABEL: atomicrmw_add_i32_acquire:
263265
; LA64: # %bb.0:
264-
; LA64-NEXT: amadd_db.w $a0, $a1, $a0
266+
; LA64-NEXT: amadd_db.w $a2, $a1, $a0
267+
; LA64-NEXT: move $a0, $a2
265268
; LA64-NEXT: ret
266269
%1 = atomicrmw add ptr %a, i32 %b acquire
267270
ret i32 %1
@@ -280,7 +283,8 @@ define i64 @atomicrmw_add_i64_acquire(ptr %a, i64 %b) nounwind {
280283
;
281284
; LA64-LABEL: atomicrmw_add_i64_acquire:
282285
; LA64: # %bb.0:
283-
; LA64-NEXT: amadd_db.d $a0, $a1, $a0
286+
; LA64-NEXT: amadd_db.d $a2, $a1, $a0
287+
; LA64-NEXT: move $a0, $a2
284288
; LA64-NEXT: ret
285289
%1 = atomicrmw add ptr %a, i64 %b acquire
286290
ret i64 %1
@@ -403,8 +407,9 @@ define i32 @atomicrmw_sub_i32_acquire(ptr %a, i32 %b) nounwind {
403407
;
404408
; LA64-LABEL: atomicrmw_sub_i32_acquire:
405409
; LA64: # %bb.0:
406-
; LA64-NEXT: sub.w $a1, $zero, $a1
407-
; LA64-NEXT: amadd_db.w $a0, $a1, $a0
410+
; LA64-NEXT: sub.w $a2, $zero, $a1
411+
; LA64-NEXT: amadd_db.w $a1, $a2, $a0
412+
; LA64-NEXT: move $a0, $a1
408413
; LA64-NEXT: ret
409414
%1 = atomicrmw sub ptr %a, i32 %b acquire
410415
ret i32 %1
@@ -423,8 +428,9 @@ define i64 @atomicrmw_sub_i64_acquire(ptr %a, i64 %b) nounwind {
423428
;
424429
; LA64-LABEL: atomicrmw_sub_i64_acquire:
425430
; LA64: # %bb.0:
426-
; LA64-NEXT: sub.d $a1, $zero, $a1
427-
; LA64-NEXT: amadd_db.d $a0, $a1, $a0
431+
; LA64-NEXT: sub.d $a2, $zero, $a1
432+
; LA64-NEXT: amadd_db.d $a1, $a2, $a0
433+
; LA64-NEXT: move $a0, $a1
428434
; LA64-NEXT: ret
429435
%1 = atomicrmw sub ptr %a, i64 %b acquire
430436
ret i64 %1
@@ -624,8 +630,8 @@ define i8 @atomicrmw_and_i8_acquire(ptr %a, i8 %b) nounwind {
624630
; LA64-NEXT: orn $a1, $a1, $a3
625631
; LA64-NEXT: addi.w $a3, $zero, -4
626632
; LA64-NEXT: and $a0, $a0, $a3
627-
; LA64-NEXT: amand_db.w $a0, $a1, $a0
628-
; LA64-NEXT: srl.w $a0, $a0, $a2
633+
; LA64-NEXT: amand_db.w $a3, $a1, $a0
634+
; LA64-NEXT: srl.w $a0, $a3, $a2
629635
; LA64-NEXT: ret
630636
%1 = atomicrmw and ptr %a, i8 %b acquire
631637
ret i8 %1
@@ -664,8 +670,8 @@ define i16 @atomicrmw_and_i16_acquire(ptr %a, i16 %b) nounwind {
664670
; LA64-NEXT: orn $a1, $a1, $a2
665671
; LA64-NEXT: addi.w $a2, $zero, -4
666672
; LA64-NEXT: and $a0, $a0, $a2
667-
; LA64-NEXT: amand_db.w $a0, $a1, $a0
668-
; LA64-NEXT: srl.w $a0, $a0, $a3
673+
; LA64-NEXT: amand_db.w $a2, $a1, $a0
674+
; LA64-NEXT: srl.w $a0, $a2, $a3
669675
; LA64-NEXT: ret
670676
%1 = atomicrmw and ptr %a, i16 %b acquire
671677
ret i16 %1
@@ -686,7 +692,8 @@ define i32 @atomicrmw_and_i32_acquire(ptr %a, i32 %b) nounwind {
686692
;
687693
; LA64-LABEL: atomicrmw_and_i32_acquire:
688694
; LA64: # %bb.0:
689-
; LA64-NEXT: amand_db.w $a0, $a1, $a0
695+
; LA64-NEXT: amand_db.w $a2, $a1, $a0
696+
; LA64-NEXT: move $a0, $a2
690697
; LA64-NEXT: ret
691698
%1 = atomicrmw and ptr %a, i32 %b acquire
692699
ret i32 %1
@@ -705,7 +712,8 @@ define i64 @atomicrmw_and_i64_acquire(ptr %a, i64 %b) nounwind {
705712
;
706713
; LA64-LABEL: atomicrmw_and_i64_acquire:
707714
; LA64: # %bb.0:
708-
; LA64-NEXT: amand_db.d $a0, $a1, $a0
715+
; LA64-NEXT: amand_db.d $a2, $a1, $a0
716+
; LA64-NEXT: move $a0, $a2
709717
; LA64-NEXT: ret
710718
%1 = atomicrmw and ptr %a, i64 %b acquire
711719
ret i64 %1
@@ -736,8 +744,8 @@ define i8 @atomicrmw_or_i8_acquire(ptr %a, i8 %b) nounwind {
736744
; LA64-NEXT: slli.d $a0, $a0, 3
737745
; LA64-NEXT: andi $a1, $a1, 255
738746
; LA64-NEXT: sll.w $a1, $a1, $a0
739-
; LA64-NEXT: amor_db.w $a1, $a1, $a2
740-
; LA64-NEXT: srl.w $a0, $a1, $a0
747+
; LA64-NEXT: amor_db.w $a3, $a1, $a2
748+
; LA64-NEXT: srl.w $a0, $a3, $a0
741749
; LA64-NEXT: ret
742750
%1 = atomicrmw or ptr %a, i8 %b acquire
743751
ret i8 %1
@@ -768,8 +776,8 @@ define i16 @atomicrmw_or_i16_acquire(ptr %a, i16 %b) nounwind {
768776
; LA64-NEXT: slli.d $a0, $a0, 3
769777
; LA64-NEXT: bstrpick.d $a1, $a1, 15, 0
770778
; LA64-NEXT: sll.w $a1, $a1, $a0
771-
; LA64-NEXT: amor_db.w $a1, $a1, $a2
772-
; LA64-NEXT: srl.w $a0, $a1, $a0
779+
; LA64-NEXT: amor_db.w $a3, $a1, $a2
780+
; LA64-NEXT: srl.w $a0, $a3, $a0
773781
; LA64-NEXT: ret
774782
%1 = atomicrmw or ptr %a, i16 %b acquire
775783
ret i16 %1
@@ -790,7 +798,8 @@ define i32 @atomicrmw_or_i32_acquire(ptr %a, i32 %b) nounwind {
790798
;
791799
; LA64-LABEL: atomicrmw_or_i32_acquire:
792800
; LA64: # %bb.0:
793-
; LA64-NEXT: amor_db.w $a0, $a1, $a0
801+
; LA64-NEXT: amor_db.w $a2, $a1, $a0
802+
; LA64-NEXT: move $a0, $a2
794803
; LA64-NEXT: ret
795804
%1 = atomicrmw or ptr %a, i32 %b acquire
796805
ret i32 %1
@@ -809,7 +818,8 @@ define i64 @atomicrmw_or_i64_acquire(ptr %a, i64 %b) nounwind {
809818
;
810819
; LA64-LABEL: atomicrmw_or_i64_acquire:
811820
; LA64: # %bb.0:
812-
; LA64-NEXT: amor_db.d $a0, $a1, $a0
821+
; LA64-NEXT: amor_db.d $a2, $a1, $a0
822+
; LA64-NEXT: move $a0, $a2
813823
; LA64-NEXT: ret
814824
%1 = atomicrmw or ptr %a, i64 %b acquire
815825
ret i64 %1
@@ -840,8 +850,8 @@ define i8 @atomicrmw_xor_i8_acquire(ptr %a, i8 %b) nounwind {
840850
; LA64-NEXT: slli.d $a0, $a0, 3
841851
; LA64-NEXT: andi $a1, $a1, 255
842852
; LA64-NEXT: sll.w $a1, $a1, $a0
843-
; LA64-NEXT: amxor_db.w $a1, $a1, $a2
844-
; LA64-NEXT: srl.w $a0, $a1, $a0
853+
; LA64-NEXT: amxor_db.w $a3, $a1, $a2
854+
; LA64-NEXT: srl.w $a0, $a3, $a0
845855
; LA64-NEXT: ret
846856
%1 = atomicrmw xor ptr %a, i8 %b acquire
847857
ret i8 %1
@@ -872,8 +882,8 @@ define i16 @atomicrmw_xor_i16_acquire(ptr %a, i16 %b) nounwind {
872882
; LA64-NEXT: slli.d $a0, $a0, 3
873883
; LA64-NEXT: bstrpick.d $a1, $a1, 15, 0
874884
; LA64-NEXT: sll.w $a1, $a1, $a0
875-
; LA64-NEXT: amxor_db.w $a1, $a1, $a2
876-
; LA64-NEXT: srl.w $a0, $a1, $a0
885+
; LA64-NEXT: amxor_db.w $a3, $a1, $a2
886+
; LA64-NEXT: srl.w $a0, $a3, $a0
877887
; LA64-NEXT: ret
878888
%1 = atomicrmw xor ptr %a, i16 %b acquire
879889
ret i16 %1
@@ -894,7 +904,8 @@ define i32 @atomicrmw_xor_i32_acquire(ptr %a, i32 %b) nounwind {
894904
;
895905
; LA64-LABEL: atomicrmw_xor_i32_acquire:
896906
; LA64: # %bb.0:
897-
; LA64-NEXT: amxor_db.w $a0, $a1, $a0
907+
; LA64-NEXT: amxor_db.w $a2, $a1, $a0
908+
; LA64-NEXT: move $a0, $a2
898909
; LA64-NEXT: ret
899910
%1 = atomicrmw xor ptr %a, i32 %b acquire
900911
ret i32 %1
@@ -913,7 +924,8 @@ define i64 @atomicrmw_xor_i64_acquire(ptr %a, i64 %b) nounwind {
913924
;
914925
; LA64-LABEL: atomicrmw_xor_i64_acquire:
915926
; LA64: # %bb.0:
916-
; LA64-NEXT: amxor_db.d $a0, $a1, $a0
927+
; LA64-NEXT: amxor_db.d $a2, $a1, $a0
928+
; LA64-NEXT: move $a0, $a2
917929
; LA64-NEXT: ret
918930
%1 = atomicrmw xor ptr %a, i64 %b acquire
919931
ret i64 %1

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