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[SelectionDAGBuilder] Pass fast math flags to getNode calls rather than trying to set them after the fact.:
This removes the after the fact FMF handling from D46854 in favor of passing fast math flags to getNode. This should be a superset of D87130. This required adding a SDNodeFlags to SelectionDAG::getSetCC. Now we manage to contant fold some stuff undefs during the initial getNode that we don't do in later DAG combines. Differential Revision: https://reviews.llvm.org/D87200
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+130
-263
lines changed

15 files changed

+130
-263
lines changed

llvm/include/llvm/CodeGen/SelectionDAG.h

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1049,8 +1049,8 @@ class SelectionDAG {
10491049
/// Helper function to make it easier to build SetCC's if you just have an
10501050
/// ISD::CondCode instead of an SDValue.
10511051
SDValue getSetCC(const SDLoc &DL, EVT VT, SDValue LHS, SDValue RHS,
1052-
ISD::CondCode Cond, SDValue Chain = SDValue(),
1053-
bool IsSignaling = false) {
1052+
ISD::CondCode Cond, SDNodeFlags Flags = SDNodeFlags(),
1053+
SDValue Chain = SDValue(), bool IsSignaling = false) {
10541054
assert(LHS.getValueType().isVector() == RHS.getValueType().isVector() &&
10551055
"Cannot compare scalars to vectors");
10561056
assert(LHS.getValueType().isVector() == VT.isVector() &&
@@ -1060,7 +1060,7 @@ class SelectionDAG {
10601060
if (Chain)
10611061
return getNode(IsSignaling ? ISD::STRICT_FSETCCS : ISD::STRICT_FSETCC, DL,
10621062
{VT, MVT::Other}, {Chain, LHS, RHS, getCondCode(Cond)});
1063-
return getNode(ISD::SETCC, DL, VT, LHS, RHS, getCondCode(Cond));
1063+
return getNode(ISD::SETCC, DL, VT, LHS, RHS, getCondCode(Cond), Flags);
10641064
}
10651065

10661066
/// Helper function to make it easier to build Select's if you just have

llvm/include/llvm/CodeGen/SelectionDAGNodes.h

Lines changed: 13 additions & 56 deletions
Original file line numberDiff line numberDiff line change
@@ -357,10 +357,6 @@ template<> struct simplify_type<SDUse> {
357357
/// the backend.
358358
struct SDNodeFlags {
359359
private:
360-
// This bit is used to determine if the flags are in a defined state. It is
361-
// only used by SelectionDAGBuilder.
362-
bool AnyDefined : 1;
363-
364360
bool NoUnsignedWrap : 1;
365361
bool NoSignedWrap : 1;
366362
bool Exact : 1;
@@ -382,9 +378,8 @@ struct SDNodeFlags {
382378
public:
383379
/// Default constructor turns off all optimization flags.
384380
SDNodeFlags()
385-
: AnyDefined(false), NoUnsignedWrap(false), NoSignedWrap(false),
386-
Exact(false), NoNaNs(false), NoInfs(false),
387-
NoSignedZeros(false), AllowReciprocal(false),
381+
: NoUnsignedWrap(false), NoSignedWrap(false), Exact(false), NoNaNs(false),
382+
NoInfs(false), NoSignedZeros(false), AllowReciprocal(false),
388383
AllowContract(false), ApproximateFuncs(false),
389384
AllowReassociation(false), NoFPExcept(false) {}
390385

@@ -399,56 +394,18 @@ struct SDNodeFlags {
399394
setAllowReassociation(FPMO.hasAllowReassoc());
400395
}
401396

402-
/// Sets the state of the flags to the defined state.
403-
void setDefined() { AnyDefined = true; }
404-
/// Returns true if the flags are in a defined state.
405-
bool isDefined() const { return AnyDefined; }
406-
407397
// These are mutators for each flag.
408-
void setNoUnsignedWrap(bool b) {
409-
setDefined();
410-
NoUnsignedWrap = b;
411-
}
412-
void setNoSignedWrap(bool b) {
413-
setDefined();
414-
NoSignedWrap = b;
415-
}
416-
void setExact(bool b) {
417-
setDefined();
418-
Exact = b;
419-
}
420-
void setNoNaNs(bool b) {
421-
setDefined();
422-
NoNaNs = b;
423-
}
424-
void setNoInfs(bool b) {
425-
setDefined();
426-
NoInfs = b;
427-
}
428-
void setNoSignedZeros(bool b) {
429-
setDefined();
430-
NoSignedZeros = b;
431-
}
432-
void setAllowReciprocal(bool b) {
433-
setDefined();
434-
AllowReciprocal = b;
435-
}
436-
void setAllowContract(bool b) {
437-
setDefined();
438-
AllowContract = b;
439-
}
440-
void setApproximateFuncs(bool b) {
441-
setDefined();
442-
ApproximateFuncs = b;
443-
}
444-
void setAllowReassociation(bool b) {
445-
setDefined();
446-
AllowReassociation = b;
447-
}
448-
void setNoFPExcept(bool b) {
449-
setDefined();
450-
NoFPExcept = b;
451-
}
398+
void setNoUnsignedWrap(bool b) { NoUnsignedWrap = b; }
399+
void setNoSignedWrap(bool b) { NoSignedWrap = b; }
400+
void setExact(bool b) { Exact = b; }
401+
void setNoNaNs(bool b) { NoNaNs = b; }
402+
void setNoInfs(bool b) { NoInfs = b; }
403+
void setNoSignedZeros(bool b) { NoSignedZeros = b; }
404+
void setAllowReciprocal(bool b) { AllowReciprocal = b; }
405+
void setAllowContract(bool b) { AllowContract = b; }
406+
void setApproximateFuncs(bool b) { ApproximateFuncs = b; }
407+
void setAllowReassociation(bool b) { AllowReassociation = b; }
408+
void setNoFPExcept(bool b) { NoFPExcept = b; }
452409

453410
// These are accessors for each flag.
454411
bool hasNoUnsignedWrap() const { return NoUnsignedWrap; }

llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -7398,9 +7398,9 @@ SDValue DAGCombiner::visitXOR(SDNode *N) {
73987398
if (N0.hasOneUse()) {
73997399
// FIXME Can we handle multiple uses? Could we token factor the chain
74007400
// results from the new/old setcc?
7401-
SDValue SetCC = DAG.getSetCC(SDLoc(N0), VT, LHS, RHS, NotCC,
7402-
N0.getOperand(0),
7403-
N0Opcode == ISD::STRICT_FSETCCS);
7401+
SDValue SetCC =
7402+
DAG.getSetCC(SDLoc(N0), VT, LHS, RHS, NotCC, SDNodeFlags(),
7403+
N0.getOperand(0), N0Opcode == ISD::STRICT_FSETCCS);
74047404
CombineTo(N, SetCC);
74057405
DAG.ReplaceAllUsesOfValueWith(N0.getValue(1), SetCC.getValue(1));
74067406
recursivelyDeleteUnusedNodes(N0.getNode());

llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

Lines changed: 8 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1735,12 +1735,16 @@ bool SelectionDAGLegalize::LegalizeSetCCCondCode(
17351735
if (CCCode != ISD::SETO && CCCode != ISD::SETUO) {
17361736
// If we aren't the ordered or unorder operation,
17371737
// then the pattern is (LHS CC1 RHS) Opc (LHS CC2 RHS).
1738-
SetCC1 = DAG.getSetCC(dl, VT, LHS, RHS, CC1, Chain, IsSignaling);
1739-
SetCC2 = DAG.getSetCC(dl, VT, LHS, RHS, CC2, Chain, IsSignaling);
1738+
SetCC1 = DAG.getSetCC(dl, VT, LHS, RHS, CC1, SDNodeFlags(), Chain,
1739+
IsSignaling);
1740+
SetCC2 = DAG.getSetCC(dl, VT, LHS, RHS, CC2, SDNodeFlags(), Chain,
1741+
IsSignaling);
17401742
} else {
17411743
// Otherwise, the pattern is (LHS CC1 LHS) Opc (RHS CC2 RHS)
1742-
SetCC1 = DAG.getSetCC(dl, VT, LHS, LHS, CC1, Chain, IsSignaling);
1743-
SetCC2 = DAG.getSetCC(dl, VT, RHS, RHS, CC2, Chain, IsSignaling);
1744+
SetCC1 = DAG.getSetCC(dl, VT, LHS, LHS, CC1, SDNodeFlags(), Chain,
1745+
IsSignaling);
1746+
SetCC2 = DAG.getSetCC(dl, VT, RHS, RHS, CC2, SDNodeFlags(), Chain,
1747+
IsSignaling);
17441748
}
17451749
if (Chain)
17461750
Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, SetCC1.getValue(1),

llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp

Lines changed: 6 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1777,17 +1777,18 @@ void DAGTypeLegalizer::FloatExpandSetCCOperands(SDValue &NewLHS,
17771777
// The following can be improved, but not that much.
17781778
SDValue Tmp1, Tmp2, Tmp3, OutputChain;
17791779
Tmp1 = DAG.getSetCC(dl, getSetCCResultType(LHSHi.getValueType()), LHSHi,
1780-
RHSHi, ISD::SETOEQ, Chain, IsSignaling);
1780+
RHSHi, ISD::SETOEQ, SDNodeFlags(), Chain, IsSignaling);
17811781
OutputChain = Tmp1->getNumValues() > 1 ? Tmp1.getValue(1) : SDValue();
17821782
Tmp2 = DAG.getSetCC(dl, getSetCCResultType(LHSLo.getValueType()), LHSLo,
1783-
RHSLo, CCCode, OutputChain, IsSignaling);
1783+
RHSLo, CCCode, SDNodeFlags(), OutputChain, IsSignaling);
17841784
OutputChain = Tmp2->getNumValues() > 1 ? Tmp2.getValue(1) : SDValue();
17851785
Tmp3 = DAG.getNode(ISD::AND, dl, Tmp1.getValueType(), Tmp1, Tmp2);
1786-
Tmp1 = DAG.getSetCC(dl, getSetCCResultType(LHSHi.getValueType()), LHSHi,
1787-
RHSHi, ISD::SETUNE, OutputChain, IsSignaling);
1786+
Tmp1 =
1787+
DAG.getSetCC(dl, getSetCCResultType(LHSHi.getValueType()), LHSHi, RHSHi,
1788+
ISD::SETUNE, SDNodeFlags(), OutputChain, IsSignaling);
17881789
OutputChain = Tmp1->getNumValues() > 1 ? Tmp1.getValue(1) : SDValue();
17891790
Tmp2 = DAG.getSetCC(dl, getSetCCResultType(LHSHi.getValueType()), LHSHi,
1790-
RHSHi, CCCode, OutputChain, IsSignaling);
1791+
RHSHi, CCCode, SDNodeFlags(), OutputChain, IsSignaling);
17911792
OutputChain = Tmp2->getNumValues() > 1 ? Tmp2.getValue(1) : SDValue();
17921793
Tmp1 = DAG.getNode(ISD::AND, dl, Tmp1.getValueType(), Tmp1, Tmp2);
17931794
NewLHS = DAG.getNode(ISD::OR, dl, Tmp1.getValueType(), Tmp1, Tmp3);

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