[SelectionDAG] Disjoint Or could be also constant offset.

If the addr base of a Load/Store Inst is an Or-disjoint with a constant,
it could be selected to an MI with constans offset if the target have.

Signed-off-by: feng.feng <[email protected]>

Author: fengfeng09

llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

@@ -5203,15 +5203,8 @@ bool SelectionDAG::isADDLike(SDValue Op) const {
 }
 
 bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const {
-  if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) ||
-      !isa<ConstantSDNode>(Op.getOperand(1)))
-    return false;
-
-  if (Op.getOpcode() == ISD::OR &&
-      !MaskedValueIsZero(Op.getOperand(0), Op.getConstantOperandAPInt(1)))
-    return false;
-
-  return true;
+  return isa<ConstantSDNode>(Op.getOperand(1)) &&
+         (Op.getOpcode() == ISD::ADD || isADDLike(Op));
 }
 
 bool SelectionDAG::isKnownNeverNaN(SDValue Op, bool SNaN, unsigned Depth) const {

llvm/test/CodeGen/AVR/base-with-add-like-constant-offset.ll

@@ -4,11 +4,10 @@
 define void @test(i16 %x, ptr addrspace(1) %o) {
 ; CHECK-LABEL: test:
 ; CHECK:       ; %bb.0:
-; CHECK-NEXT:    ori r22, 10
 ; CHECK-NEXT:    mov r30, r22
 ; CHECK-NEXT:    mov r31, r23
-; CHECK-NEXT:    std Z+1, r25
-; CHECK-NEXT:    st Z, r24
+; CHECK-NEXT:    std Z+11, r25
+; CHECK-NEXT:    std Z+10, r24
 ; CHECK-NEXT:    ret
   %int = ptrtoint ptr addrspace(1) %o to i16
   %or = or disjoint i16 %int, 10