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[X86] scalarizeExtEltFP - don't assume setcc result pre-legalisation will be vXi1
Another fold may have generated the setcc using getSetCCResultType Encountered this while investigating topological sorting of dag nodes
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llvm/lib/Target/X86/X86ISelLowering.cpp

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -46802,9 +46802,8 @@ static SDValue scalarizeExtEltFP(SDNode *ExtElt, SelectionDAG &DAG,
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// need to convert vector bool to a scalar bool.
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if (DCI.isBeforeLegalize() && Vec.getOpcode() == ISD::VSELECT &&
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Vec.getOperand(0).getOpcode() == ISD::SETCC &&
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Vec.getOperand(0).getOperand(0).getValueType() == VecVT) {
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assert(Vec.getOperand(0).getValueType().getScalarType() == MVT::i1 &&
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"Unexpected cond type for combine");
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Vec.getOperand(0).getOperand(0).getValueType() == VecVT &&
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Vec.getOperand(0).getValueType().getScalarType() == MVT::i1) {
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// ext (sel Cond, X, Y), 0 --> sel (ext Cond, 0), (ext X, 0), (ext Y, 0)
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SDLoc DL(ExtElt);
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SDValue Ext0 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL,

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