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goldsteinngoldsteinn
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Remove unrelated tests
1 parent 6eee306 commit b21f82b

7 files changed

+1
-20
lines changed

‎llvm/test/CodeGen/MIR/AMDGPU/long-branch-reg-all-sgpr-used.ll

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -38,7 +38,6 @@
3838
; CHECK-NEXT: fp64-fp16-output-denormals: true
3939
; CHECK-NEXT: highBitsOf32BitAddress: 0
4040
; CHECK-NEXT: occupancy: 5
41-
; CHECK-NEXT: numPhysicalVGPRSpillLanes: 0
4241
; CHECK-NEXT: scavengeFI: '%stack.0'
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; CHECK-NEXT: vgprForAGPRCopy: ''
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; CHECK-NEXT: sgprForEXECCopy: '$sgpr100_sgpr101'
@@ -305,7 +304,6 @@
305304
; CHECK-NEXT: fp64-fp16-output-denormals: true
306305
; CHECK-NEXT: highBitsOf32BitAddress: 0
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; CHECK-NEXT: occupancy: 5
308-
; CHECK-NEXT: numPhysicalVGPRSpillLanes: 0
309307
; CHECK-NEXT: scavengeFI: '%stack.0'
310308
; CHECK-NEXT: vgprForAGPRCopy: ''
311309
; CHECK-NEXT: sgprForEXECCopy: '$sgpr100_sgpr101'

‎llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-after-pei.ll

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -38,7 +38,6 @@
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; AFTER-PEI-NEXT: fp64-fp16-output-denormals: true
3939
; AFTER-PEI-NEXT: highBitsOf32BitAddress: 0
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; AFTER-PEI-NEXT: occupancy: 5
41-
; AFTER-PEI-NEXT: numPhysicalVGPRSpillLanes: 0
4241
; AFTER-PEI-NEXT: scavengeFI: '%stack.3'
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; AFTER-PEI-NEXT: vgprForAGPRCopy: ''
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; AFTER-PEI-NEXT: sgprForEXECCopy: ''

‎llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-long-branch-reg-debug.ll

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -39,7 +39,6 @@
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; CHECK-NEXT: fp64-fp16-output-denormals: true
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; CHECK-NEXT: BitsOf32BitAddress: 0
4141
; CHECK-NEXT: occupancy: 8
42-
; CHECK-NEXT: numPhysicalVGPRSpillLanes: 0
4342
; CHECK-NEXT: vgprForAGPRCopy: ''
4443
; CHECK-NEXT: sgprForEXECCopy: '$sgpr100_sgpr101'
4544
; CHECK-NEXT: longBranchReservedReg: '$sgpr2_sgpr3'

‎llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-long-branch-reg.ll

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -39,7 +39,6 @@
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; CHECK-NEXT: fp64-fp16-output-denormals: true
4040
; CHECK-NEXT: BitsOf32BitAddress: 0
4141
; CHECK-NEXT: occupancy: 8
42-
; CHECK-NEXT: numPhysicalVGPRSpillLanes: 0
4342
; CHECK-NEXT: vgprForAGPRCopy: ''
4443
; CHECK-NEXT: sgprForEXECCopy: '$sgpr100_sgpr101'
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; CHECK-NEXT: longBranchReservedReg: '$sgpr2_sgpr3'

‎llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-no-ir.mir

Lines changed: 0 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -48,7 +48,6 @@
4848
# FULL-NEXT: fp64-fp16-output-denormals: true
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# FULL-NEXT: highBitsOf32BitAddress: 0
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# FULL-NEXT: occupancy: 8
51-
# FULL-NEXT: numPhysicalVGPRSpillLanes: 0
5251
# FULL-NEXT: vgprForAGPRCopy: ''
5352
# FULL-NEXT: sgprForEXECCopy: ''
5453
# FULL-NEXT: longBranchReservedReg: ''
@@ -82,7 +81,6 @@
8281
# SIMPLE-NEXT: workItemIDY: { reg: '$vgpr31', mask: 1047552 }
8382
# SIMPLE-NEXT: workItemIDZ: { reg: '$vgpr31', mask: 1072693248 }
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# SIMPLE-NEXT: occupancy: 8
85-
# SIMPLE-NEXT: numPhysicalVGPRSpillLanes: 0
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# SIMPLE-NEXT: body:
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name: kernel0
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machineFunctionInfo:
@@ -154,7 +152,6 @@ body: |
154152
# FULL-NEXT: fp64-fp16-output-denormals: true
155153
# FULL-NEXT: highBitsOf32BitAddress: 0
156154
# FULL-NEXT: occupancy: 8
157-
# FULL-NEXT: numPhysicalVGPRSpillLanes: 0
158155
# FULL-NEXT: vgprForAGPRCopy: ''
159156
# FULL-NEXT: sgprForEXECCopy: ''
160157
# FULL-NEXT: longBranchReservedReg: ''
@@ -177,7 +174,6 @@ body: |
177174
# SIMPLE-NEXT: workItemIDY: { reg: '$vgpr31', mask: 1047552 }
178175
# SIMPLE-NEXT: workItemIDZ: { reg: '$vgpr31', mask: 1072693248 }
179176
# SIMPLE-NEXT: occupancy: 8
180-
# SIMPLE-NEXT: numPhysicalVGPRSpillLanes: 0
181177
# SIMPLE-NEXT: body:
182178

183179
name: no_mfi
@@ -231,7 +227,6 @@ body: |
231227
# FULL-NEXT: fp64-fp16-output-denormals: true
232228
# FULL-NEXT: highBitsOf32BitAddress: 0
233229
# FULL-NEXT: occupancy: 8
234-
# FULL-NEXT: numPhysicalVGPRSpillLanes: 0
235230
# FULL-NEXT: vgprForAGPRCopy: ''
236231
# FULL-NEXT: sgprForEXECCopy: ''
237232
# FULL-NEXT: longBranchReservedReg: ''
@@ -254,7 +249,6 @@ body: |
254249
# SIMPLE-NEXT: workItemIDY: { reg: '$vgpr31', mask: 1047552 }
255250
# SIMPLE-NEXT: workItemIDZ: { reg: '$vgpr31', mask: 1072693248 }
256251
# SIMPLE-NEXT: occupancy: 8
257-
# SIMPLE-NEXT: numPhysicalVGPRSpillLanes: 0
258252
# SIMPLE-NEXT: body:
259253

260254
name: empty_mfi
@@ -309,7 +303,6 @@ body: |
309303
# FULL-NEXT: fp64-fp16-output-denormals: true
310304
# FULL-NEXT: highBitsOf32BitAddress: 0
311305
# FULL-NEXT: occupancy: 8
312-
# FULL-NEXT: numPhysicalVGPRSpillLanes: 0
313306
# FULL-NEXT: vgprForAGPRCopy: ''
314307
# FULL-NEXT: sgprForEXECCopy: ''
315308
# FULL-NEXT: longBranchReservedReg: ''
@@ -333,7 +326,6 @@ body: |
333326
# SIMPLE-NEXT: workItemIDY: { reg: '$vgpr31', mask: 1047552 }
334327
# SIMPLE-NEXT: workItemIDZ: { reg: '$vgpr31', mask: 1072693248 }
335328
# SIMPLE-NEXT: occupancy: 8
336-
# SIMPLE-NEXT: numPhysicalVGPRSpillLanes: 0
337329
# SIMPLE-NEXT: body:
338330

339331
name: empty_mfi_entry_func

‎llvm/test/CodeGen/MIR/AMDGPU/machine-function-info.ll

Lines changed: 1 addition & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -48,11 +48,10 @@
4848
; CHECK-NEXT: fp64-fp16-output-denormals: true
4949
; CHECK-NEXT: highBitsOf32BitAddress: 0
5050
; CHECK-NEXT: occupancy: 8
51-
; CHECK-NEXT: numPhysicalVGPRSpillLanes: 0
5251
; CHECK-NEXT: vgprForAGPRCopy: ''
5352
; CHECK-NEXT: sgprForEXECCopy: '$sgpr100_sgpr101'
5453
; CHECK-NEXT: longBranchReservedReg: ''
55-
; CHECK-NEXT: hasInitWholeWave: false
54+
; CHECK-NEXT: hasInitWholeWave: false
5655
; CHECK-NEXT: body:
5756
define amdgpu_kernel void @kernel(i32 %arg0, i64 %arg1, <16 x i32> %arg2) {
5857
%gep = getelementptr inbounds [512 x float], ptr addrspace(3) @lds, i32 0, i32 %arg0
@@ -95,7 +94,6 @@ define amdgpu_kernel void @kernel(i32 %arg0, i64 %arg1, <16 x i32> %arg2) {
9594
; CHECK-NEXT: fp64-fp16-output-denormals: true
9695
; CHECK-NEXT: highBitsOf32BitAddress: 0
9796
; CHECK-NEXT: occupancy: 10
98-
; CHECK-NEXT: numPhysicalVGPRSpillLanes: 0
9997
; CHECK-NEXT: vgprForAGPRCopy: ''
10098
; CHECK-NEXT: sgprForEXECCopy: '$sgpr100_sgpr101'
10199
; CHECK-NEXT: longBranchReservedReg: ''
@@ -166,7 +164,6 @@ define amdgpu_ps void @gds_size_shader(i32 %arg0, i32 inreg %arg1) #5 {
166164
; CHECK-NEXT: fp64-fp16-output-denormals: true
167165
; CHECK-NEXT: highBitsOf32BitAddress: 0
168166
; CHECK-NEXT: occupancy: 8
169-
; CHECK-NEXT: numPhysicalVGPRSpillLanes: 0
170167
; CHECK-NEXT: vgprForAGPRCopy: ''
171168
; CHECK-NEXT: sgprForEXECCopy: '$sgpr100_sgpr101'
172169
; CHECK-NEXT: longBranchReservedReg: ''
@@ -219,7 +216,6 @@ define void @function() {
219216
; CHECK-NEXT: fp64-fp16-output-denormals: true
220217
; CHECK-NEXT: highBitsOf32BitAddress: 0
221218
; CHECK-NEXT: occupancy: 8
222-
; CHECK-NEXT: numPhysicalVGPRSpillLanes: 0
223219
; CHECK-NEXT: vgprForAGPRCopy: ''
224220
; CHECK-NEXT: sgprForEXECCopy: '$sgpr100_sgpr101'
225221
; CHECK-NEXT: longBranchReservedReg: ''

‎llvm/test/tools/llvm-reduce/mir/preserve-machine-function-info-amdgpu.mir

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -52,12 +52,10 @@
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# RESULT-NEXT: fp64-fp16-output-denormals: false
5353
# RESULT-NEXT: highBitsOf32BitAddress: 4276993775
5454
# RESULT-NEXT: occupancy: 8
55-
# RESULT-NEXT: numPhysicalVGPRSpillLanes: 0
5655
# RESULT-NEXT: wwmReservedRegs:
5756
# RESULT-NEXT: - '$vgpr2'
5857
# RESULT-NEXT: - '$vgpr3'
5958
# RESULT-NEXT: vgprForAGPRCopy: '$vgpr33'
60-
# RESULT-NEXT: body:
6159

6260
# RESULT: S_NOP 0, implicit $sgpr48_sgpr49_sgpr50_sgpr51
6361
# RESULT: S_NOP 0, implicit $vgpr33

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