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[RISCV] Check that both registers of a CV Reg-Reg memory address are GPRs. (#136079)
The assembly parser was checking for any register instead of GPR. I've removed the custom diagnostic message from the RegReg operand to give a less confusing error on bad input. The mnemonics are shared with other encodings that don't use reg-reg memory operand. I also fixed the parsed operand location, but I'm not sure it matters.
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3 files changed

+38
-31
lines changed

3 files changed

+38
-31
lines changed

‎llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp

Lines changed: 9 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -2581,28 +2581,31 @@ ParseStatus RISCVAsmParser::parseRegReg(OperandVector &Operands) {
25812581
if (getLexer().getKind() != AsmToken::Identifier)
25822582
return ParseStatus::NoMatch;
25832583

2584+
SMLoc S = getLoc();
25842585
StringRef OffsetRegName = getLexer().getTok().getIdentifier();
25852586
MCRegister OffsetReg = matchRegisterNameHelper(OffsetRegName);
2586-
if (!OffsetReg)
2587-
return Error(getLoc(), "invalid register");
2587+
if (!OffsetReg ||
2588+
!RISCVMCRegisterClasses[RISCV::GPRRegClassID].contains(OffsetReg))
2589+
return Error(getLoc(), "expected GPR register");
25882590
getLexer().Lex();
25892591

25902592
if (parseToken(AsmToken::LParen, "expected '(' or invalid operand"))
25912593
return ParseStatus::Failure;
25922594

25932595
if (getLexer().getKind() != AsmToken::Identifier)
2594-
return Error(getLoc(), "expected register");
2596+
return Error(getLoc(), "expected GPR register");
25952597

25962598
StringRef BaseRegName = getLexer().getTok().getIdentifier();
25972599
MCRegister BaseReg = matchRegisterNameHelper(BaseRegName);
2598-
if (!BaseReg)
2599-
return Error(getLoc(), "invalid register");
2600+
if (!BaseReg ||
2601+
!RISCVMCRegisterClasses[RISCV::GPRRegClassID].contains(BaseReg))
2602+
return Error(getLoc(), "expected GPR register");
26002603
getLexer().Lex();
26012604

26022605
if (parseToken(AsmToken::RParen, "expected ')'"))
26032606
return ParseStatus::Failure;
26042607

2605-
Operands.push_back(RISCVOperand::createRegReg(BaseReg, OffsetReg, getLoc()));
2608+
Operands.push_back(RISCVOperand::createRegReg(BaseReg, OffsetReg, S));
26062609

26072610
return ParseStatus::Success;
26082611
}

‎llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -17,8 +17,6 @@
1717
def CVrrAsmOperand : AsmOperandClass {
1818
let Name = "RegReg";
1919
let ParserMethod = "parseRegReg";
20-
let DiagnosticType = "InvalidRegReg";
21-
let DiagnosticString = "operands must be register and register";
2220
}
2321

2422
def CVrr : Operand<i32>,

‎llvm/test/MC/RISCV/corev/XCVmem-invalid.s

Lines changed: 29 additions & 23 deletions
Original file line numberDiff line numberDiff line change
@@ -2,7 +2,7 @@
22
# RUN: | FileCheck %s --check-prefixes=CHECK-ERROR
33

44
cv.lb t0, (0), 0
5-
# CHECK-ERROR: :[[@LINE-1]]:11: error: operands must be register and register
5+
# CHECK-ERROR: :[[@LINE-1]]:11: error: invalid operand for instruction
66

77
cv.lb 0, (t1), 0
88
# CHECK-ERROR: :[[@LINE-1]]:7: error: invalid operand for instruction
@@ -17,7 +17,7 @@ cv.lb t0, (t1), 2048
1717
# CHECK-ERROR: :[[@LINE-1]]:17: error: operand must be a symbol with %lo/%pcrel_lo/%tprel_lo specifier or an integer in the range [-2048, 2047]
1818

1919
cv.lb t0, (0), t1
20-
# CHECK-ERROR: :[[@LINE-1]]:11: error: operands must be register and register
20+
# CHECK-ERROR: :[[@LINE-1]]:11: error: invalid operand for instruction
2121

2222
cv.lb 0, (t1), t1
2323
# CHECK-ERROR: :[[@LINE-1]]:7: error: invalid operand for instruction
@@ -32,7 +32,7 @@ cv.lb t0, (t1), t2, t3
3232
# CHECK-ERROR: :[[@LINE-1]]:21: error: invalid operand for instruction
3333

3434
cv.lbu t0, (0), 0
35-
# CHECK-ERROR: :[[@LINE-1]]:12: error: operands must be register and register
35+
# CHECK-ERROR: :[[@LINE-1]]:12: error: invalid operand for instruction
3636

3737
cv.lbu 0, (t1), 0
3838
# CHECK-ERROR: :[[@LINE-1]]:8: error: invalid operand for instruction
@@ -47,7 +47,7 @@ cv.lbu t0, (t1), 2048
4747
# CHECK-ERROR: :[[@LINE-1]]:18: error: operand must be a symbol with %lo/%pcrel_lo/%tprel_lo specifier or an integer in the range [-2048, 2047]
4848

4949
cv.lbu t0, (0), t1
50-
# CHECK-ERROR: :[[@LINE-1]]:12: error: operands must be register and register
50+
# CHECK-ERROR: :[[@LINE-1]]:12: error: invalid operand for instruction
5151

5252
cv.lbu 0, (t1), t1
5353
# CHECK-ERROR: :[[@LINE-1]]:8: error: invalid operand for instruction
@@ -62,7 +62,7 @@ cv.lbu t0, (t1), t2, t3
6262
# CHECK-ERROR: :[[@LINE-1]]:22: error: invalid operand for instruction
6363

6464
cv.lh t0, (0), 0
65-
# CHECK-ERROR: :[[@LINE-1]]:11: error: operands must be register and register
65+
# CHECK-ERROR: :[[@LINE-1]]:11: error: invalid operand for instruction
6666

6767
cv.lh 0, (t1), 0
6868
# CHECK-ERROR: :[[@LINE-1]]:7: error: invalid operand for instruction
@@ -77,10 +77,10 @@ cv.lh t0, (t1), 2048
7777
# CHECK-ERROR: :[[@LINE-1]]:17: error: operand must be a symbol with %lo/%pcrel_lo/%tprel_lo specifier or an integer in the range [-2048, 2047]
7878

7979
cv.lh t0, (0), t1
80-
# CHECK-ERROR: :[[@LINE-1]]:11: error: operands must be register and register
80+
# CHECK-ERROR: :[[@LINE-1]]:11: error: invalid operand for instruction
8181

8282
cv.lh t0, t1(0)
83-
# CHECK-ERROR: :[[@LINE-1]]:14: error: expected register
83+
# CHECK-ERROR: :[[@LINE-1]]:14: error: expected GPR register
8484

8585
cv.lh 0, (t1), t1
8686
# CHECK-ERROR: :[[@LINE-1]]:7: error: invalid operand for instruction
@@ -95,7 +95,7 @@ cv.lh t0, (t1), t2, t3
9595
# CHECK-ERROR: :[[@LINE-1]]:21: error: invalid operand for instruction
9696

9797
cv.lhu t0, (0), 0
98-
# CHECK-ERROR: :[[@LINE-1]]:12: error: operands must be register and register
98+
# CHECK-ERROR: :[[@LINE-1]]:12: error: invalid operand for instruction
9999

100100
cv.lhu 0, (t1), 0
101101
# CHECK-ERROR: :[[@LINE-1]]:8: error: invalid operand for instruction
@@ -110,10 +110,10 @@ cv.lhu t0, (t1), 2048
110110
# CHECK-ERROR: :[[@LINE-1]]:18: error: operand must be a symbol with %lo/%pcrel_lo/%tprel_lo specifier or an integer in the range [-2048, 2047]
111111

112112
cv.lhu t0, (0), t1
113-
# CHECK-ERROR: :[[@LINE-1]]:12: error: operands must be register and register
113+
# CHECK-ERROR: :[[@LINE-1]]:12: error: invalid operand for instruction
114114

115115
cv.lhu t0, t1(0)
116-
# CHECK-ERROR: :[[@LINE-1]]:15: error: expected register
116+
# CHECK-ERROR: :[[@LINE-1]]:15: error: expected GPR register
117117

118118
cv.lhu 0, t0, t1
119119
# CHECK-ERROR: :[[@LINE-1]]:13: error: expected '(' or invalid operand
@@ -128,7 +128,7 @@ cv.lhu t0, (t1), t2, t3
128128
# CHECK-ERROR: :[[@LINE-1]]:22: error: invalid operand for instruction
129129

130130
cv.lw t0, (0), 0
131-
# CHECK-ERROR: :[[@LINE-1]]:11: error: operands must be register and register
131+
# CHECK-ERROR: :[[@LINE-1]]:11: error: invalid operand for instruction
132132

133133
cv.lw 0, (t1), 0
134134
# CHECK-ERROR: :[[@LINE-1]]:7: error: invalid operand for instruction
@@ -143,10 +143,10 @@ cv.lw t0, (t1), 2048
143143
# CHECK-ERROR: :[[@LINE-1]]:17: error: operand must be a symbol with %lo/%pcrel_lo/%tprel_lo specifier or an integer in the range [-2048, 2047]
144144

145145
cv.lw t0, (0), t1
146-
# CHECK-ERROR: :[[@LINE-1]]:11: error: operands must be register and register
146+
# CHECK-ERROR: :[[@LINE-1]]:11: error: invalid operand for instruction
147147

148148
cv.lw t0, t1(0)
149-
# CHECK-ERROR: :[[@LINE-1]]:14: error: expected register
149+
# CHECK-ERROR: :[[@LINE-1]]:14: error: expected GPR register
150150

151151
cv.lw 0, (t0), t1
152152
# CHECK-ERROR: :[[@LINE-1]]:7: error: invalid operand for instruction
@@ -158,22 +158,22 @@ cv.lw t0, (t1)
158158
# CHECK-ERROR: :[[@LINE-1]]:1: error: too few operands for instruction
159159

160160
cv.lw t0, (t1), t2, t3
161-
# CHECK-ERROR: :[[@LINE-1]]:21: error: invalid operand for instruction
161+
# CHECK-ERROR: :[[@LINE-1]]:21: error: invalid operand for instruction
162162

163163
cv.sb t0, (0), 0
164-
# CHECK-ERROR: :[[@LINE-1]]:11: error: operands must be register and register
164+
# CHECK-ERROR: :[[@LINE-1]]:11: error: invalid operand for instruction
165165

166166
cv.sb 0, (t0), 0
167167
# CHECK-ERROR: :[[@LINE-1]]:7: error: invalid operand for instruction
168168

169169
cv.sb t0, 0(t1)
170-
# CHECK-ERROR: :[[@LINE-1]]:11: error: operands must be register and register
170+
# CHECK-ERROR: :[[@LINE-1]]:11: error: invalid operand for instruction
171171

172172
cv.sb t0, (t1), 2048
173173
# CHECK-ERROR: :[[@LINE-1]]:17: error: operand must be a symbol with %lo/%pcrel_lo/%tprel_lo specifier or an integer in the range [-2048, 2047]
174174

175175
cv.sb t0, (0), t1
176-
# CHECK-ERROR: :[[@LINE-1]]:11: error: operands must be register and register
176+
# CHECK-ERROR: :[[@LINE-1]]:11: error: invalid operand for instruction
177177

178178
cv.sb 0, (t1), t1
179179
# CHECK-ERROR: :[[@LINE-1]]:7: error: invalid operand for instruction
@@ -182,19 +182,19 @@ cv.sb t0
182182
# CHECK-ERROR: :[[@LINE-1]]:1: error: too few operands for instruction
183183

184184
cv.sh t0, (0), 0
185-
# CHECK-ERROR: :[[@LINE-1]]:11: error: operands must be register and register
185+
# CHECK-ERROR: :[[@LINE-1]]:11: error: invalid operand for instruction
186186

187187
cv.sh 0, (t1), 0
188188
# CHECK-ERROR: :[[@LINE-1]]:7: error: invalid operand for instruction
189189

190190
cv.sh t0, 0(t1)
191-
# CHECK-ERROR: :[[@LINE-1]]:11: error: operands must be register and register
191+
# CHECK-ERROR: :[[@LINE-1]]:11: error: invalid operand for instruction
192192

193193
cv.sh t0, (t1), 2048
194194
# CHECK-ERROR: :[[@LINE-1]]:17: error: operand must be a symbol with %lo/%pcrel_lo/%tprel_lo specifier or an integer in the range [-2048, 2047]
195195

196196
cv.sh t0, (0), t1
197-
# CHECK-ERROR: :[[@LINE-1]]:11: error: operands must be register and register
197+
# CHECK-ERROR: :[[@LINE-1]]:11: error: invalid operand for instruction
198198

199199
cv.sh 0, (t1), t1
200200
# CHECK-ERROR: :[[@LINE-1]]:7: error: invalid operand for instruction
@@ -203,22 +203,28 @@ cv.sh t0
203203
# CHECK-ERROR: :[[@LINE-1]]:1: error: too few operands for instruction
204204

205205
cv.sw t0, (0), 0
206-
# CHECK-ERROR: :[[@LINE-1]]:11: error: operands must be register and register
206+
# CHECK-ERROR: :[[@LINE-1]]:11: error: invalid operand for instruction
207207

208208
cv.sw 0, (t1), 0
209209
# CHECK-ERROR: :[[@LINE-1]]:7: error: invalid operand for instruction
210210

211211
cv.sw t0, 0(t1)
212-
# CHECK-ERROR: :[[@LINE-1]]:11: error: operands must be register and register
212+
# CHECK-ERROR: :[[@LINE-1]]:11: error: invalid operand for instruction
213213

214214
cv.sw t0, (t1), 2048
215215
# CHECK-ERROR: :[[@LINE-1]]:17: error: operand must be a symbol with %lo/%pcrel_lo/%tprel_lo specifier or an integer in the range [-2048, 2047]
216216

217217
cv.sw t0, (0), t1
218-
# CHECK-ERROR: :[[@LINE-1]]:11: error: operands must be register and register
218+
# CHECK-ERROR: :[[@LINE-1]]:11: error: invalid operand for instruction
219219

220220
cv.sw 0, (t1), t1
221221
# CHECK-ERROR: :[[@LINE-1]]:7: error: invalid operand for instruction
222222

223223
cv.sw t0
224224
# CHECK-ERROR: :[[@LINE-1]]:1: error: too few operands for instruction
225+
226+
cv.lb t0, f0(t1)
227+
# CHECK-ERROR: :[[@LINE-1]]:11: error: expected GPR register
228+
229+
cv.sb t0, t0(f1)
230+
# CHECK-ERROR: :[[@LINE-1]]:14: error: expected GPR register

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