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[RISCV] Move performCombineVMergeAndVOps into RISCVFoldMasks
Continuing on from 72e6c1c, this moves the vmerge fold peephole into RISCVFoldMasks. Instead of reasoning in chain and glue nodes, this sinks the True operand to just before the vmerge pseudo so it can reuse its VL/mask/false/passthru operands. Most of the time we're able to do this without any hitches because we check that the vmerge is the only user of True. However there are certain cases where we have write-after-read dependencies of physical registers that we also need to sink too, e.g. fcsr in @vmerge_vfcvt_rm in test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-masked-vops.ll We also need to implement the masked -> unmasked peephole, since the vmerge fold peephole can produce new masked pseudos with all one masks that should then be unmasked. However that peephole is still kept in RISCVISelDAGToDAG to minimize the diff for this patch. It will be switched over in a later patch.
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