fixup! [AArch64][GloablISel] Refactor Combine G_CONCAT_VECTOR

Author: chuongg3

llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h

@@ -227,19 +227,15 @@ class CombinerHelper {
   /// ==========================================================
   /// Check if the G_CONCAT_VECTORS \p MI is undef or if it
   /// can be flattened into a build_vector.
-  /// In the first case \p bool will be true.
-  /// In the second case \p SmallVector<Register> will contain the operands
+  /// In the first case \p Ops will be empty
+  /// In the second case \p Ops will contain the operands
   /// needed to produce the flattened build_vector.
   ///
   /// \pre MI.getOpcode() == G_CONCAT_VECTORS.
-  bool
-  matchCombineConcatVectors(MachineInstr &MI,
-                            std::pair<bool, SmallVector<Register>> &matchinfo);
-  /// Replace \p MI with a flattened build_vector with \p SmallVector<Register>
-  /// or an implicit_def if \p bool is true.
-  void
-  applyCombineConcatVectors(MachineInstr &MI,
-                            std::pair<bool, SmallVector<Register>> &matchinfo);
+  bool matchCombineConcatVectors(MachineInstr &MI, SmallVector<Register> &Ops);
+  /// Replace \p MI with a flattened build_vector with \p Ops
+  /// or an implicit_def if \p Ops is empty.
+  void applyCombineConcatVectors(MachineInstr &MI, SmallVector<Register> &Ops);
 
   /// Try to combine G_SHUFFLE_VECTOR into G_CONCAT_VECTORS.
   /// Returns true if MI changed.

llvm/include/llvm/Target/GlobalISel/Combine.td

@@ -1254,7 +1254,7 @@ def match_ors : GICombineRule<
   (apply [{ Helper.applyBuildFn(*${root}, ${matchinfo}); }])>;
 
 // Combines concat operations
-def concat_matchinfo : GIDefMatchData<"std::pair<bool, SmallVector<Register>>">;
+def concat_matchinfo : GIDefMatchData<"SmallVector<Register>">;
 def combine_concat_vector : GICombineRule<
   (defs root:$root, concat_matchinfo:$matchinfo),
   (match (wip_match_opcode G_CONCAT_VECTORS):$root,
@@ -1342,4 +1342,4 @@ def all_combines : GICombineGroup<[trivial_combines, insert_vec_elt_combines,
 // compile time performance.
 def optnone_combines : GICombineGroup<[trivial_combines,
     ptr_add_immed_chain, combines_for_extload,
-    not_cmp_fold, opt_brcond_by_inverting_cond]>;
+    not_cmp_fold, opt_brcond_by_inverting_cond, combine_concat_vector]>;

llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp

@@ -222,11 +222,11 @@ void CombinerHelper::applyCombineCopy(MachineInstr &MI) {
   replaceRegWith(MRI, DstReg, SrcReg);
 }
 
-bool CombinerHelper::matchCombineConcatVectors(
-    MachineInstr &MI, std::pair<bool, SmallVector<Register>> &matchinfo) {
+bool CombinerHelper::matchCombineConcatVectors(MachineInstr &MI,
+                                               SmallVector<Register> &Ops) {
   assert(MI.getOpcode() == TargetOpcode::G_CONCAT_VECTORS &&
          "Invalid instruction");
-  matchinfo.first = true;
+  bool IsUndef = true;
   MachineInstr *Undef = nullptr;
 
   // Walk over all the operands of concat vectors and check if they are
@@ -240,11 +240,11 @@ bool CombinerHelper::matchCombineConcatVectors(
       return false;
     switch (Def->getOpcode()) {
     case TargetOpcode::G_BUILD_VECTOR:
-      matchinfo.first = false;
+      IsUndef = false;
       // Remember the operands of the build_vector to fold
       // them into the yet-to-build flattened concat vectors.
       for (const MachineOperand &BuildVecMO : Def->uses())
-        matchinfo.second.push_back(BuildVecMO.getReg());
+        Ops.push_back(BuildVecMO.getReg());
       break;
     case TargetOpcode::G_IMPLICIT_DEF: {
       LLT OpType = MRI.getType(Reg);
@@ -260,7 +260,7 @@ bool CombinerHelper::matchCombineConcatVectors(
       // for the flattening.
       for (unsigned EltIdx = 0, EltEnd = OpType.getNumElements();
            EltIdx != EltEnd; ++EltIdx)
-        matchinfo.second.push_back(Undef->getOperand(0).getReg());
+        Ops.push_back(Undef->getOperand(0).getReg());
       break;
     }
     default:
@@ -270,15 +270,18 @@ bool CombinerHelper::matchCombineConcatVectors(
 
   // Check if the combine is illegal
   LLT DstTy = MRI.getType(MI.getOperand(0).getReg());
-  if (!isLegalOrBeforeLegalizer({TargetOpcode::G_BUILD_VECTOR,
-                                 {DstTy, MRI.getType(matchinfo.second[0])}})) {
+  if (!isLegalOrBeforeLegalizer(
+          {TargetOpcode::G_BUILD_VECTOR, {DstTy, MRI.getType(Ops[0])}})) {
     return false;
   }
 
+  if (IsUndef)
+    Ops.clear();
+
   return true;
 }
-void CombinerHelper::applyCombineConcatVectors(
-    MachineInstr &MI, std::pair<bool, SmallVector<Register>> &matchinfo) {
+void CombinerHelper::applyCombineConcatVectors(MachineInstr &MI,
+                                               SmallVector<Register> &Ops) {
   // We determined that the concat_vectors can be flatten.
   // Generate the flattened build_vector.
   Register DstReg = MI.getOperand(0).getReg();
@@ -291,10 +294,10 @@ void CombinerHelper::applyCombineConcatVectors(
   // clean that up.  For now, given we already gather this information
   // in matchCombineConcatVectors, just save compile time and issue the
   // right thing.
-  if (matchinfo.first)
+  if (Ops.empty())
     Builder.buildUndef(NewDstReg);
   else
-    Builder.buildBuildVector(NewDstReg, matchinfo.second);
+    Builder.buildBuildVector(NewDstReg, Ops);
   MI.eraseFromParent();
   replaceRegWith(MRI, DstReg, NewDstReg);
 }

llvm/lib/Target/AArch64/AArch64Combine.td

@@ -64,7 +64,7 @@ def AArch64PreLegalizerCombiner: GICombiner<
 }
 
 def AArch64O0PreLegalizerCombiner: GICombiner<
-  "AArch64O0PreLegalizerCombinerImpl", [optnone_combines, combine_concat_vector]> {
+  "AArch64O0PreLegalizerCombinerImpl", [optnone_combines]> {
   let CombineAllMethodName = "tryCombineAllImpl";
 }