Skip to content

Commit b49a0db

Browse files
authored
[AMDGPU] Fix comments about afn and arcp in fast unsafe fdiv handling (#68982)
1 parent ed0a141 commit b49a0db

File tree

2 files changed

+4
-4
lines changed

2 files changed

+4
-4
lines changed

llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -4641,8 +4641,8 @@ bool AMDGPULegalizerInfo::legalizeFastUnsafeFDIV(MachineInstr &MI,
46414641
}
46424642
}
46434643

4644-
// For f16 require arcp only.
4645-
// For f32 require afn+arcp.
4644+
// For f16 require afn or arcp.
4645+
// For f32 require afn.
46464646
if (!AllowInaccurateRcp && (ResTy != LLT::scalar(16) ||
46474647
!MI.getFlag(MachineInstr::FmArcp)))
46484648
return false;

llvm/lib/Target/AMDGPU/SIISelLowering.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -9577,8 +9577,8 @@ SDValue SITargetLowering::lowerFastUnsafeFDIV(SDValue Op,
95779577
}
95789578
}
95799579

9580-
// For f16 require arcp only.
9581-
// For f32 require afn+arcp.
9580+
// For f16 require afn or arcp.
9581+
// For f32 require afn.
95829582
if (!AllowInaccurateRcp && (VT != MVT::f16 || !Flags.hasAllowReciprocal()))
95839583
return SDValue();
95849584

0 commit comments

Comments
 (0)