@@ -417,6 +417,30 @@ gentbl_cc_library(
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deps = [":RiscvTdFiles" ],
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)
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+ gentbl_cc_library (
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+ name = "basic_riscv_andes_vector_builtins_gen" ,
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+ tbl_outs = {"include/clang/Basic/riscv_andes_vector_builtins.inc" : ["-gen-riscv-andes-vector-builtins" ]},
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+ tblgen = ":clang-tblgen" ,
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+ td_file = "include/clang/Basic/riscv_andes_vector.td" ,
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+ deps = [":RiscvTdFiles" ],
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+ )
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+
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+ gentbl_cc_library (
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+ name = "basic_riscv_andes_vector_builtin_cg_gen" ,
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+ tbl_outs = {"include/clang/Basic/riscv_andes_vector_builtin_cg.inc" : ["-gen-riscv-andes-vector-builtin-codegen" ]},
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+ tblgen = ":clang-tblgen" ,
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+ td_file = "include/clang/Basic/riscv_andes_vector.td" ,
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+ deps = [":RiscvTdFiles" ],
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+ )
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+
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+ gentbl_cc_library (
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+ name = "basic_riscv_andes_vector_builtin_sema_gen" ,
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+ tbl_outs = {"include/clang/Basic/riscv_andes_vector_builtin_sema.inc" : ["-gen-riscv-andes-vector-builtin-sema" ]},
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+ tblgen = ":clang-tblgen" ,
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+ td_file = "include/clang/Basic/riscv_andes_vector.td" ,
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+ deps = [":RiscvTdFiles" ],
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+ )
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+
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gentbl_cc_library (
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name = "basic_arm_cde_gen" ,
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tbl_outs = {"include/clang/Basic/arm_cde_builtins.inc" : ["-gen-arm-cde-builtin-def" ]},
@@ -634,6 +658,7 @@ cc_library(
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":basic_builtins_spirv_gen" ,
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":basic_builtins_x86_64_gen" ,
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":basic_builtins_x86_gen" ,
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+ ":basic_riscv_andes_vector_builtins_gen" ,
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":basic_riscv_sifive_vector_builtins_gen" ,
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":basic_riscv_vector_builtin_cg_gen" ,
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":basic_riscv_vector_builtins_gen" ,
@@ -993,6 +1018,7 @@ cc_library(
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":basic_arm_sve_sema_rangechecks_gen" ,
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":basic_arm_sve_streaming_attrs_gen" ,
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":basic_builtins_gen" ,
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+ ":basic_riscv_andes_vector_builtin_sema_gen" ,
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":basic_riscv_sifive_vector_builtin_sema_gen" ,
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":basic_riscv_vector_builtin_sema_gen" ,
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":edit" ,
@@ -1725,6 +1751,7 @@ cc_library(
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":basic_arm_cde_cg_gen" ,
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":basic_arm_sme_builtin_cg_gen" ,
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":basic_arm_sve_builtin_cg_gen" ,
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+ ":basic_riscv_andes_vector_builtin_cg_gen" ,
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":basic_riscv_sifive_vector_builtin_cg_gen" ,
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":basic_riscv_vector_builtin_cg_gen" ,
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":driver" ,
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