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[RISCV][NFC] Move Zawrs/Zacas implementation to RISCVInstrInfoZa.td (#76940)
To keep the structure of TableGen files clear. The definitions are simplified by the way.
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lines changed

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llvm/lib/Target/RISCV/RISCVInstrInfo.td

Lines changed: 1 addition & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -729,22 +729,6 @@ def UNIMP : RVInstI<0b001, OPC_SYSTEM, (outs), (ins), "unimp", "">,
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let imm12 = 0b110000000000;
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}
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let Predicates = [HasStdExtZawrs] in {
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def WRS_NTO : RVInstI<0b000, OPC_SYSTEM, (outs), (ins), "wrs.nto", "">,
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Sched<[]> {
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let rs1 = 0;
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let rd = 0;
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let imm12 = 0b000000001101;
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}
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def WRS_STO : RVInstI<0b000, OPC_SYSTEM, (outs), (ins), "wrs.sto", "">,
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Sched<[]> {
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let rs1 = 0;
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let rd = 0;
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let imm12 = 0b000000011101;
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}
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} // Predicates = [HasStdExtZawrs]
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} // hasSideEffects = 1, mayLoad = 0, mayStore = 0
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def CSRRW : CSR_ir<0b001, "csrrw">;
@@ -2095,6 +2079,7 @@ include "RISCVInstrInfoM.td"
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// Atomic
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include "RISCVInstrInfoA.td"
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include "RISCVInstrInfoZa.td"
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// Scalar FP
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include "RISCVInstrInfoF.td"

llvm/lib/Target/RISCV/RISCVInstrInfoA.td

Lines changed: 1 addition & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -7,8 +7,7 @@
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//===----------------------------------------------------------------------===//
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//
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// This file describes the RISC-V instructions from the standard 'A', Atomic
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// Instructions extension as well as the experimental 'Zacas' (Atomic
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// Compare-and-Swap) extension.
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// Instructions extension.
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//
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//===----------------------------------------------------------------------===//
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@@ -96,15 +95,6 @@ defm AMOMAXU_D : AMO_rr_aq_rl<0b11100, 0b011, "amomaxu.d">,
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Sched<[WriteAtomicD, ReadAtomicDA, ReadAtomicDD]>;
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} // Predicates = [HasStdExtA, IsRV64]
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let Predicates = [HasStdExtZacas] in {
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defm AMOCAS_W : AMO_rr_aq_rl<0b00101, 0b010, "amocas.w">;
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defm AMOCAS_D : AMO_rr_aq_rl<0b00101, 0b011, "amocas.d">;
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} // Predicates = [HasStdExtZacas]
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let Predicates = [HasStdExtZacas, IsRV64] in {
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defm AMOCAS_Q : AMO_rr_aq_rl<0b00101, 0b100, "amocas.q">;
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} // Predicates = [HasStdExtZacas, IsRV64]
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//===----------------------------------------------------------------------===//
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// Pseudo-instructions and codegen patterns
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//===----------------------------------------------------------------------===//
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Original file line numberDiff line numberDiff line change
@@ -0,0 +1,44 @@
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//===-- RISCVInstrInfoZa.td - RISC-V Atomic instructions ---*- tablegen -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file describes the RISC-V instructions from the standard atomic 'Za*'
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// extensions:
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// - Zawrs (v1.0) : Wait-on-Reservation-Set.
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// - Zacas (v1.0-rc1) : Atomic Compare-and-Swap.
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//
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// Zacas (Atomic Compare-and-Swap)
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//===----------------------------------------------------------------------===//
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let Predicates = [HasStdExtZacas] in {
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defm AMOCAS_W : AMO_rr_aq_rl<0b00101, 0b010, "amocas.w">;
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defm AMOCAS_D : AMO_rr_aq_rl<0b00101, 0b011, "amocas.d">;
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} // Predicates = [HasStdExtZacas]
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let Predicates = [HasStdExtZacas, IsRV64] in {
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defm AMOCAS_Q : AMO_rr_aq_rl<0b00101, 0b100, "amocas.q">;
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} // Predicates = [HasStdExtZacas, IsRV64]
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//===----------------------------------------------------------------------===//
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// Zawrs (Wait-on-Reservation-Set)
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//===----------------------------------------------------------------------===//
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let hasSideEffects = 1, mayLoad = 0, mayStore = 0 in
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class WRSInst<bits<12> funct12, string opcodestr>
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: RVInstI<0b000, OPC_SYSTEM, (outs), (ins), opcodestr, ""> {
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let rs1 = 0;
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let rd = 0;
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let imm12 = funct12;
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}
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let Predicates = [HasStdExtZawrs] in {
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def WRS_NTO : WRSInst<0b000000001101, "wrs.nto">, Sched<[]>;
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def WRS_STO : WRSInst<0b000000011101, "wrs.sto">, Sched<[]>;
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} // Predicates = [HasStdExtZawrs]

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