Skip to content

Commit b5a78c7

Browse files
fhahnfhahn
committed
!fixup after rebase
1 parent 049e5fa commit b5a78c7

File tree

4 files changed

+36
-27
lines changed

4 files changed

+36
-27
lines changed

‎llvm/include/llvm/Analysis/AssumeBundleQueries.h

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -104,9 +104,12 @@ struct RetainedKnowledge {
104104
uint64_t ArgValue = 0;
105105
Value *IRArgValue = nullptr;
106106
Value *WasOn = nullptr;
107+
RetainedKnowledge(Attribute::AttrKind AttrKind = Attribute::None,
108+
uint64_t ArgValue = 0, Value *WasOn = nullptr)
109+
: AttrKind(AttrKind), ArgValue(ArgValue), WasOn(WasOn) {}
107110
bool operator==(RetainedKnowledge Other) const {
108111
return AttrKind == Other.AttrKind && WasOn == Other.WasOn &&
109-
ArgValue == Other.ArgValue;
112+
ArgValue == Other.ArgValue && IRArgValue == Other.IRArgValue;
110113
}
111114
bool operator!=(RetainedKnowledge Other) const { return !(*this == Other); }
112115
/// This is only intended for use in std::min/std::max between attribute that

‎llvm/lib/Analysis/AssumeBundleQueries.cpp

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -114,7 +114,9 @@ llvm::getKnowledgeFromBundle(AssumeInst &Assume,
114114
};
115115
if (BOI.End - BOI.Begin > ABA_Argument)
116116
Result.ArgValue = GetArgOr1(0);
117-
Result.IRArgValue = getValueFromBundleOpInfo(Assume, BOI, ABA_Argument);
117+
Result.IRArgValue = bundleHasArgument(BOI, ABA_Argument)
118+
? getValueFromBundleOpInfo(Assume, BOI, ABA_Argument)
119+
: nullptr;
118120
if (Result.AttrKind == Attribute::Alignment)
119121
if (BOI.End - BOI.Begin > ABA_Argument + 1)
120122
Result.ArgValue = MinAlign(Result.ArgValue, GetArgOr1(1));

‎llvm/lib/Analysis/Loads.cpp

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -49,7 +49,7 @@ static bool isDereferenceableAndAlignedPointerViaAssumption(
4949
RetainedKnowledge DerefRK;
5050
bool IsAligned = Ptr->getPointerAlignment(DL) >= Alignment;
5151
return getKnowledgeForValue(
52-
Ptr, {Attribute::Dereferenceable, Attribute::Alignment}, AC,
52+
Ptr, {Attribute::Dereferenceable, Attribute::Alignment}, *AC,
5353
[&](RetainedKnowledge RK, Instruction *Assume, auto) {
5454
if (!isValidAssumeForContext(Assume, CtxI, DT))
5555
return false;
@@ -203,12 +203,12 @@ static bool isDereferenceableAndAlignedPointer(
203203
Size, DL, CtxI, AC, DT, TLI,
204204
Visited, MaxDepth);
205205

206-
return isDereferenceableAndAlignedPointerViaAssumption(
207-
V, Alignment,
208-
[Size](const RetainedKnowledge &RK) {
209-
return RK.ArgValue >= Size.getZExtValue();
210-
},
211-
DL, CtxI, AC, DT);
206+
return AC && isDereferenceableAndAlignedPointerViaAssumption(
207+
V, Alignment,
208+
[Size](const RetainedKnowledge &RK) {
209+
return RK.ArgValue >= Size.getZExtValue();
210+
},
211+
DL, CtxI, AC, DT);
212212
}
213213

214214
bool llvm::isDereferenceableAndAlignedPointer(

‎llvm/test/Transforms/LoopVectorize/dereferenceable-info-from-assumption-variable-size.ll

Lines changed: 22 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -16,19 +16,19 @@ define void @deref_assumption_in_preheader_non_constant_trip_count_access_i8(ptr
1616
; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[N]], [[N_MOD_VF]]
1717
; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
1818
; CHECK: [[VECTOR_BODY]]:
19-
; CHECK-NEXT: [[TMP0:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
20-
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[A]], i64 [[TMP0]]
21-
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[TMP0]]
19+
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
20+
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[A]], i64 [[INDEX]]
21+
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[INDEX]]
2222
; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds i8, ptr [[TMP2]], i32 0
2323
; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i8>, ptr [[TMP3]], align 1
2424
; CHECK-NEXT: [[TMP4:%.*]] = icmp sge <2 x i8> [[WIDE_LOAD]], zeroinitializer
2525
; CHECK-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP1]], i32 0
2626
; CHECK-NEXT: [[WIDE_LOAD1:%.*]] = load <2 x i8>, ptr [[TMP5]], align 1
2727
; CHECK-NEXT: [[PREDPHI:%.*]] = select <2 x i1> [[TMP4]], <2 x i8> [[WIDE_LOAD]], <2 x i8> [[WIDE_LOAD1]]
28-
; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i8, ptr [[C]], i64 [[TMP0]]
28+
; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i8, ptr [[C]], i64 [[INDEX]]
2929
; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds i8, ptr [[TMP6]], i32 0
3030
; CHECK-NEXT: store <2 x i8> [[PREDPHI]], ptr [[TMP7]], align 1
31-
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[TMP0]], 2
31+
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
3232
; CHECK-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
3333
; CHECK-NEXT: br i1 [[TMP8]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
3434
; CHECK: [[MIDDLE_BLOCK]]:
@@ -99,19 +99,19 @@ define void @deref_assumption_in_preheader_non_constant_trip_count_access_i32(pt
9999
; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[N]], [[N_MOD_VF]]
100100
; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
101101
; CHECK: [[VECTOR_BODY]]:
102-
; CHECK-NEXT: [[TMP0:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
103-
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i32, ptr [[A]], i64 [[TMP0]]
104-
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[TMP0]]
102+
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
103+
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i32, ptr [[A]], i64 [[INDEX]]
104+
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[INDEX]]
105105
; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i32 0
106106
; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i32>, ptr [[TMP3]], align 1
107107
; CHECK-NEXT: [[TMP4:%.*]] = icmp sge <2 x i32> [[WIDE_LOAD]], zeroinitializer
108108
; CHECK-NEXT: [[TMP5:%.*]] = getelementptr i32, ptr [[TMP1]], i32 0
109109
; CHECK-NEXT: [[WIDE_LOAD1:%.*]] = load <2 x i32>, ptr [[TMP5]], align 1
110110
; CHECK-NEXT: [[PREDPHI:%.*]] = select <2 x i1> [[TMP4]], <2 x i32> [[WIDE_LOAD]], <2 x i32> [[WIDE_LOAD1]]
111-
; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, ptr [[C]], i64 [[TMP0]]
111+
; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, ptr [[C]], i64 [[INDEX]]
112112
; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds i32, ptr [[TMP6]], i32 0
113113
; CHECK-NEXT: store <2 x i32> [[PREDPHI]], ptr [[TMP7]], align 1
114-
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[TMP0]], 2
114+
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
115115
; CHECK-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
116116
; CHECK-NEXT: br i1 [[TMP8]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]
117117
; CHECK: [[MIDDLE_BLOCK]]:
@@ -183,15 +183,17 @@ define void @deref_assumption_in_preheader_too_small_non_constant_trip_count_acc
183183
; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[N]], [[N_MOD_VF]]
184184
; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
185185
; CHECK: [[VECTOR_BODY]]:
186-
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[TMP0]]
186+
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_LOAD_CONTINUE2:.*]] ]
187+
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[INDEX]]
187188
; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i32 0
188189
; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i32>, ptr [[TMP3]], align 1
189190
; CHECK-NEXT: [[TMP4:%.*]] = icmp sge <2 x i32> [[WIDE_LOAD]], zeroinitializer
190191
; CHECK-NEXT: [[TMP15:%.*]] = xor <2 x i1> [[TMP4]], splat (i1 true)
191192
; CHECK-NEXT: [[TMP5:%.*]] = extractelement <2 x i1> [[TMP15]], i32 0
192193
; CHECK-NEXT: br i1 [[TMP5]], label %[[PRED_LOAD_IF:.*]], label %[[PRED_LOAD_CONTINUE:.*]]
193194
; CHECK: [[PRED_LOAD_IF]]:
194-
; CHECK-NEXT: [[TMP16:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[TMP0]]
195+
; CHECK-NEXT: [[TMP19:%.*]] = add i64 [[INDEX]], 0
196+
; CHECK-NEXT: [[TMP16:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[TMP19]]
195197
; CHECK-NEXT: [[TMP17:%.*]] = load i32, ptr [[TMP16]], align 1
196198
; CHECK-NEXT: [[TMP18:%.*]] = insertelement <2 x i32> poison, i32 [[TMP17]], i32 0
197199
; CHECK-NEXT: br label %[[PRED_LOAD_CONTINUE]]
@@ -208,10 +210,10 @@ define void @deref_assumption_in_preheader_too_small_non_constant_trip_count_acc
208210
; CHECK: [[PRED_LOAD_CONTINUE2]]:
209211
; CHECK-NEXT: [[WIDE_LOAD1:%.*]] = phi <2 x i32> [ [[TMP9]], %[[PRED_LOAD_CONTINUE]] ], [ [[TMP14]], %[[PRED_LOAD_IF1]] ]
210212
; CHECK-NEXT: [[PREDPHI:%.*]] = select <2 x i1> [[TMP4]], <2 x i32> [[WIDE_LOAD]], <2 x i32> [[WIDE_LOAD1]]
211-
; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, ptr [[C]], i64 [[TMP0]]
213+
; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, ptr [[C]], i64 [[INDEX]]
212214
; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds i32, ptr [[TMP6]], i32 0
213215
; CHECK-NEXT: store <2 x i32> [[PREDPHI]], ptr [[TMP7]], align 1
214-
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[TMP0]], 2
216+
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
215217
; CHECK-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
216218
; CHECK-NEXT: br i1 [[TMP8]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]
217219
; CHECK: [[MIDDLE_BLOCK]]:
@@ -281,15 +283,17 @@ define void @deref_assumption_in_preheader_too_small2_non_constant_trip_count_ac
281283
; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[N]], [[N_MOD_VF]]
282284
; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
283285
; CHECK: [[VECTOR_BODY]]:
284-
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[TMP0]]
286+
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_LOAD_CONTINUE2:.*]] ]
287+
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[INDEX]]
285288
; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i32 0
286289
; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i32>, ptr [[TMP3]], align 1
287290
; CHECK-NEXT: [[TMP4:%.*]] = icmp sge <2 x i32> [[WIDE_LOAD]], zeroinitializer
288291
; CHECK-NEXT: [[TMP15:%.*]] = xor <2 x i1> [[TMP4]], splat (i1 true)
289292
; CHECK-NEXT: [[TMP5:%.*]] = extractelement <2 x i1> [[TMP15]], i32 0
290293
; CHECK-NEXT: br i1 [[TMP5]], label %[[PRED_LOAD_IF:.*]], label %[[PRED_LOAD_CONTINUE:.*]]
291294
; CHECK: [[PRED_LOAD_IF]]:
292-
; CHECK-NEXT: [[TMP16:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[TMP0]]
295+
; CHECK-NEXT: [[TMP19:%.*]] = add i64 [[INDEX]], 0
296+
; CHECK-NEXT: [[TMP16:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[TMP19]]
293297
; CHECK-NEXT: [[TMP17:%.*]] = load i32, ptr [[TMP16]], align 1
294298
; CHECK-NEXT: [[TMP18:%.*]] = insertelement <2 x i32> poison, i32 [[TMP17]], i32 0
295299
; CHECK-NEXT: br label %[[PRED_LOAD_CONTINUE]]
@@ -306,10 +310,10 @@ define void @deref_assumption_in_preheader_too_small2_non_constant_trip_count_ac
306310
; CHECK: [[PRED_LOAD_CONTINUE2]]:
307311
; CHECK-NEXT: [[WIDE_LOAD1:%.*]] = phi <2 x i32> [ [[TMP9]], %[[PRED_LOAD_CONTINUE]] ], [ [[TMP14]], %[[PRED_LOAD_IF1]] ]
308312
; CHECK-NEXT: [[PREDPHI:%.*]] = select <2 x i1> [[TMP4]], <2 x i32> [[WIDE_LOAD]], <2 x i32> [[WIDE_LOAD1]]
309-
; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, ptr [[C]], i64 [[TMP0]]
313+
; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, ptr [[C]], i64 [[INDEX]]
310314
; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds i32, ptr [[TMP6]], i32 0
311315
; CHECK-NEXT: store <2 x i32> [[PREDPHI]], ptr [[TMP7]], align 1
312-
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[TMP0]], 2
316+
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
313317
; CHECK-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
314318
; CHECK-NEXT: br i1 [[TMP8]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]]
315319
; CHECK: [[MIDDLE_BLOCK]]:

0 commit comments

Comments
 (0)