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| 1 | +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 |
| 2 | +; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s |
| 3 | + |
| 4 | +@g_180 = external global i8 |
| 5 | +@g_1032 = external global [2 x i32] |
| 6 | + |
| 7 | +define i32 @PR122580(ptr %0) { |
| 8 | +; CHECK-LABEL: PR122580: |
| 9 | +; CHECK: # %bb.0: # %entry |
| 10 | +; CHECK-NEXT: movq g_180@GOTPCREL(%rip), %rax |
| 11 | +; CHECK-NEXT: cmpb $0, (%rax) |
| 12 | +; CHECK-NEXT: movl $1, %eax |
| 13 | +; CHECK-NEXT: movl $878456583, %ecx # imm = 0x345C2F07 |
| 14 | +; CHECK-NEXT: cmovnel %eax, %ecx |
| 15 | +; CHECK-NEXT: movq g_1032@GOTPCREL(%rip), %rax |
| 16 | +; CHECK-NEXT: movl $0, (%rax) |
| 17 | +; CHECK-NEXT: movl %ecx, (%rdi) |
| 18 | +; CHECK-NEXT: xorl %eax, %eax |
| 19 | +; CHECK-NEXT: retq |
| 20 | +entry: |
| 21 | + %.b577 = load i1, ptr @g_180, align 4 |
| 22 | + %1 = select i1 %.b577, i32 1, i32 878456582 |
| 23 | + store i32 0, ptr @g_1032, align 4 |
| 24 | + %.b576 = load i1, ptr @g_180, align 4 |
| 25 | + %2 = select i1 %.b576, i32 1, i32 878456582 |
| 26 | + %or542.1.i = or i32 %2, %1 |
| 27 | + store i32 0, ptr @g_1032, align 4 |
| 28 | + %.b575 = load i1, ptr @g_180, align 4 |
| 29 | + %3 = select i1 %.b575, i32 1, i32 878456582 |
| 30 | + %or542.2.i = or i32 %3, %or542.1.i |
| 31 | + %or542.3.i = or i32 %or542.2.i, 1 |
| 32 | + store i32 %or542.3.i, ptr %0, align 4 |
| 33 | + %4 = load i32, ptr %0, align 4 |
| 34 | + %div.i1796.i = sdiv i32 %4, 1096912269 |
| 35 | + %5 = tail call i32 @llvm.ctpop.i32(i32 %div.i1796.i) |
| 36 | + ret i32 %5 |
| 37 | +} |
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