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[X86] LowerCTPOP - check if the operand is a constant when collecting KnownBits
Under certain circumstances, lowering of other instructions can result in computeKnownBits being able to detect a constant that it couldn't previously. Fixes #122580
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llvm/lib/Target/X86/X86ISelLowering.cpp

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@@ -32172,6 +32172,8 @@ static SDValue LowerCTPOP(SDValue N, const X86Subtarget &Subtarget,
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// allowing us to shift the active bits down if necessary to fit into the
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// special cases below.
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KnownBits Known = DAG.computeKnownBits(Op);
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if (Known.isConstant())
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return DAG.getConstant(Known.getConstant().popcount(), DL, VT);
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unsigned LZ = Known.countMinLeadingZeros();
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unsigned TZ = Known.countMinTrailingZeros();
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assert((LZ + TZ) < Known.getBitWidth() && "Illegal shifted mask");

llvm/test/CodeGen/X86/pr122580.ll

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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s
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@g_180 = external global i8
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@g_1032 = external global [2 x i32]
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define i32 @PR122580(ptr %0) {
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; CHECK-LABEL: PR122580:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: movq g_180@GOTPCREL(%rip), %rax
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; CHECK-NEXT: cmpb $0, (%rax)
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; CHECK-NEXT: movl $1, %eax
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; CHECK-NEXT: movl $878456583, %ecx # imm = 0x345C2F07
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; CHECK-NEXT: cmovnel %eax, %ecx
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; CHECK-NEXT: movq g_1032@GOTPCREL(%rip), %rax
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; CHECK-NEXT: movl $0, (%rax)
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; CHECK-NEXT: movl %ecx, (%rdi)
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: retq
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entry:
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%.b577 = load i1, ptr @g_180, align 4
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%1 = select i1 %.b577, i32 1, i32 878456582
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store i32 0, ptr @g_1032, align 4
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%.b576 = load i1, ptr @g_180, align 4
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%2 = select i1 %.b576, i32 1, i32 878456582
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%or542.1.i = or i32 %2, %1
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store i32 0, ptr @g_1032, align 4
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%.b575 = load i1, ptr @g_180, align 4
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%3 = select i1 %.b575, i32 1, i32 878456582
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%or542.2.i = or i32 %3, %or542.1.i
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%or542.3.i = or i32 %or542.2.i, 1
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store i32 %or542.3.i, ptr %0, align 4
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%4 = load i32, ptr %0, align 4
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%div.i1796.i = sdiv i32 %4, 1096912269
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%5 = tail call i32 @llvm.ctpop.i32(i32 %div.i1796.i)
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ret i32 %5
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}

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