[RISCV] Remove redundant move from tail duplication

Tail duplication will generate the redundant move before return. It is because the MachineCopyPropogation can't recognize COPY after post-RA pseudoExpand.

This patch

1. Keep renamable after post-RA pseudoExpand
2. Let MachineCopyPropogation recognize `%0 = ADDI %1, 0` as COPY

Author: BeMg

llvm/lib/CodeGen/MachineCopyPropagation.cpp

@@ -1053,7 +1053,7 @@ void MachineCopyPropagation::BackwardCopyPropagateBlock(
     // Ignore non-trivial COPYs.
     std::optional<DestSourcePair> CopyOperands =
         isCopyInstr(MI, *TII, UseCopyInstr);
-    if (CopyOperands && MI.getNumOperands() == 2) {
+    if (CopyOperands) {
       Register DefReg = CopyOperands->Destination->getReg();
       Register SrcReg = CopyOperands->Source->getReg();
 

llvm/lib/Target/RISCV/RISCVInstrInfo.cpp

@@ -424,9 +424,11 @@ void RISCVInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
   const TargetRegisterInfo *TRI = STI.getRegisterInfo();
 
   if (RISCV::GPRRegClass.contains(DstReg, SrcReg)) {
-    BuildMI(MBB, MBBI, DL, get(RISCV::ADDI), DstReg)
-        .addReg(SrcReg, getKillRegState(KillSrc))
-        .addImm(0);
+    auto MI = BuildMI(MBB, MBBI, DL, get(RISCV::ADDI), DstReg)
+                  .addReg(SrcReg, getKillRegState(KillSrc))
+                  .addImm(0);
+    MI->getOperand(0).setIsRenamable(MBBI->getOperand(0).isRenamable());
+    MI->getOperand(1).setIsRenamable(MBBI->getOperand(1).isRenamable());
     return;
   }
 

llvm/test/CodeGen/RISCV/redundant-copy-from-tail-duplicate.ll

@@ -24,8 +24,7 @@ define signext i32 @sum(ptr %a, i32 signext %n, i1 %prof.min.iters.check, <vscal
 ; CHECK-NEXT:    vmv.s.x v12, zero
 ; CHECK-NEXT:    vsetivli zero, 1, e32, m4, ta, ma
 ; CHECK-NEXT:    vredsum.vs v8, v8, v12, v0.t
-; CHECK-NEXT:    vmv.x.s a2, v8
-; CHECK-NEXT:    mv a0, a2
+; CHECK-NEXT:    vmv.x.s a0, v8
 ; CHECK-NEXT:    ret
 entry:
   br i1 %prof.min.iters.check, label %for.body, label %vector.ph