@@ -1780,13 +1780,13 @@ SDValue VectorLegalizer::ExpandLOOP_DEPENDENCE_MASK(SDNode *N) {
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SDValue SinkValue = N->getOperand (1 );
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SDValue EltSize = N->getOperand (2 );
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- bool IsWriteAfterRead =
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- N->getOpcode () == ISD::EXPERIMENTAL_LOOP_DEPENDENCE_WAR_MASK ;
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+ bool IsReadAfterWrite =
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+ N->getOpcode () == ISD::EXPERIMENTAL_LOOP_DEPENDENCE_RAW_MASK ;
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auto VT = N->getValueType (0 );
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auto PtrVT = SourceValue->getValueType (0 );
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SDValue Diff = DAG.getNode (ISD::SUB, DL, PtrVT, SinkValue, SourceValue);
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- if (!IsWriteAfterRead )
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+ if (IsReadAfterWrite )
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Diff = DAG.getNode (ISD::ABS, DL, PtrVT, Diff);
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Diff = DAG.getNode (ISD::SDIV, DL, PtrVT, Diff, EltSize);
@@ -1796,7 +1796,7 @@ SDValue VectorLegalizer::ExpandLOOP_DEPENDENCE_MASK(SDNode *N) {
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Diff.getValueType ());
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SDValue Zero = DAG.getTargetConstant (0 , DL, PtrVT);
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SDValue Cmp = DAG.getSetCC (DL, CmpVT, Diff, Zero,
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- IsWriteAfterRead ? ISD::SETLE : ISD::SETEQ );
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+ IsReadAfterWrite ? ISD::SETEQ : ISD::SETLE );
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// Create the lane mask
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EVT SplatTY =
@@ -1807,7 +1807,7 @@ SDValue VectorLegalizer::ExpandLOOP_DEPENDENCE_MASK(SDNode *N) {
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DAG.getSetCC (DL, VT, VectorStep, DiffSplat, ISD::CondCode::SETULT);
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// Splat the compare result then OR it with the lane mask
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- auto VTElementTy = VT.getVectorElementType ();
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+ EVT VTElementTy = VT.getVectorElementType ();
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if (CmpVT.getScalarSizeInBits () < VTElementTy.getScalarSizeInBits ())
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Cmp = DAG.getNode (ISD::ZERO_EXTEND, DL, VTElementTy, Cmp);
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SDValue Splat = DAG.getSplat (VT, DL, Cmp);
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