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[ARM] Add VECTOR_REG_CAST identity fold.
v16i8 VECTOR_REG_CAST (v16i8 Op) can use v16i8 Op directly, as the VECTOR_REG_CAST is a noop.
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2 files changed

+6
-4
lines changed

2 files changed

+6
-4
lines changed

llvm/lib/Target/ARM/ARMISelLowering.cpp

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Original file line numberDiff line numberDiff line change
@@ -15444,6 +15444,9 @@ static SDValue PerformVECTOR_REG_CASTCombine(SDNode *N, SelectionDAG &DAG,
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if (ST->isLittle())
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return DAG.getNode(ISD::BITCAST, dl, VT, Op);
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// VT VECTOR_REG_CAST (VT Op) -> Op
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if (Op.getValueType() == VT)
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return Op;
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// VECTOR_REG_CAST undef -> undef
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if (Op.isUndef())
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return DAG.getUNDEF(VT);

llvm/test/CodeGen/Thumb2/mve-be.ll

Lines changed: 3 additions & 4 deletions
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@@ -278,10 +278,9 @@ define arm_aapcs_vfpcc <4 x i32> @test(ptr %data) {
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;
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; CHECK-BE-LABEL: test:
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; CHECK-BE: @ %bb.0: @ %entry
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; CHECK-BE-NEXT: movs r1, #1
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; CHECK-BE-NEXT: vldrw.u32 q1, [r0, #32]
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; CHECK-BE-NEXT: vdup.32 q0, r1
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; CHECK-BE-NEXT: vadd.i32 q0, q1, q0
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; CHECK-BE-NEXT: vldrw.u32 q0, [r0, #32]
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; CHECK-BE-NEXT: movs r0, #1
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; CHECK-BE-NEXT: vadd.i32 q0, q0, r0
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; CHECK-BE-NEXT: vrev32.8 q0, q0
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; CHECK-BE-NEXT: @APP
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; CHECK-BE-NEXT: vmullb.s32 q1, q0, q0

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