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ParkHanbumParkHanbum
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add new tests
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‎llvm/test/Transforms/VectorCombine/X86/extract-insert-poison.ll

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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -passes=vector-combine -S -mtriple=x86_64-- -mattr=SSE2 | FileCheck %s --check-prefixes=CHECK,SSE
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; RUN: opt < %s -passes=vector-combine -S -mtriple=x86_64-- -mattr=AVX2 | FileCheck %s --check-prefixes=CHECK,AVX
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define <4 x double> @src_ins0_v4f64_ext0_v2f64(<4 x double> %a, <2 x double> %b) #0 {
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; CHECK-LABEL: @src_ins0_v4f64_ext0_v2f64(
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; CHECK-NEXT: [[EXT:%.*]] = extractelement <2 x double> [[B:%.*]], i32 0
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; CHECK-NEXT: [[INS:%.*]] = insertelement <4 x double> poison, double [[EXT]], i32 0
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; CHECK-NEXT: ret <4 x double> [[INS]]
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;
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%ext = extractelement <2 x double> %b, i32 0
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%ins = insertelement <4 x double> poison, double %ext, i32 0
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ret <4 x double> %ins
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}
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define <4 x double> @src_ins1_v4f64_ext0_v2f64(<4 x double> %a, <2 x double> %b) #0 {
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; CHECK-LABEL: @src_ins1_v4f64_ext0_v2f64(
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; CHECK-NEXT: [[EXT:%.*]] = extractelement <2 x double> [[B:%.*]], i32 0
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; CHECK-NEXT: [[INS:%.*]] = insertelement <4 x double> poison, double [[EXT]], i32 1
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; CHECK-NEXT: ret <4 x double> [[INS]]
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;
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%ext = extractelement <2 x double> %b, i32 0
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%ins = insertelement <4 x double> poison, double %ext, i32 1
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ret <4 x double> %ins
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}
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define <4 x double> @src_ins2_v4f64_ext0_v2f64(<4 x double> %a, <2 x double> %b) #0 {
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; CHECK-LABEL: @src_ins2_v4f64_ext0_v2f64(
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; CHECK-NEXT: [[EXT:%.*]] = extractelement <2 x double> [[B:%.*]], i32 0
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; CHECK-NEXT: [[INS:%.*]] = insertelement <4 x double> poison, double [[EXT]], i32 2
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; CHECK-NEXT: ret <4 x double> [[INS]]
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;
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%ext = extractelement <2 x double> %b, i32 0
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%ins = insertelement <4 x double> poison, double %ext, i32 2
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ret <4 x double> %ins
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}
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define <4 x double> @src_ins3_v4f64_ext0_v2f64(<4 x double> %a, <2 x double> %b) #0 {
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; CHECK-LABEL: @src_ins3_v4f64_ext0_v2f64(
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; CHECK-NEXT: [[EXT:%.*]] = extractelement <2 x double> [[B:%.*]], i32 0
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; CHECK-NEXT: [[INS:%.*]] = insertelement <4 x double> poison, double [[EXT]], i32 3
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; CHECK-NEXT: ret <4 x double> [[INS]]
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;
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%ext = extractelement <2 x double> %b, i32 0
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%ins = insertelement <4 x double> poison, double %ext, i32 3
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ret <4 x double> %ins
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}
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define <4 x double> @src_ins0_v4f64_ext1_v2f64(<4 x double> %a, <2 x double> %b) #0 {
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; CHECK-LABEL: @src_ins0_v4f64_ext1_v2f64(
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; CHECK-NEXT: [[EXT:%.*]] = extractelement <2 x double> [[B:%.*]], i32 1
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; CHECK-NEXT: [[INS:%.*]] = insertelement <4 x double> poison, double [[EXT]], i32 0
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; CHECK-NEXT: ret <4 x double> [[INS]]
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;
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%ext = extractelement <2 x double> %b, i32 1
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%ins = insertelement <4 x double> poison, double %ext, i32 0
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ret <4 x double> %ins
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}
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define <4 x double> @src_ins1_v4f64_ext1_v2f64(<4 x double> %a, <2 x double> %b) #0 {
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; CHECK-LABEL: @src_ins1_v4f64_ext1_v2f64(
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; CHECK-NEXT: [[EXT:%.*]] = extractelement <2 x double> [[B:%.*]], i32 1
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; CHECK-NEXT: [[INS:%.*]] = insertelement <4 x double> poison, double [[EXT]], i32 1
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; CHECK-NEXT: ret <4 x double> [[INS]]
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;
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%ext = extractelement <2 x double> %b, i32 1
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%ins = insertelement <4 x double> poison, double %ext, i32 1
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ret <4 x double> %ins
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}
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define <4 x double> @src_ins2_v4f64_ext1_v2f64(<4 x double> %a, <2 x double> %b) #0 {
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; CHECK-LABEL: @src_ins2_v4f64_ext1_v2f64(
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; CHECK-NEXT: [[EXT:%.*]] = extractelement <2 x double> [[B:%.*]], i32 1
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; CHECK-NEXT: [[INS:%.*]] = insertelement <4 x double> poison, double [[EXT]], i32 2
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; CHECK-NEXT: ret <4 x double> [[INS]]
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;
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%ext = extractelement <2 x double> %b, i32 1
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%ins = insertelement <4 x double> poison, double %ext, i32 2
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ret <4 x double> %ins
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}
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define <4 x double> @src_ins3_v4f64_ext1_v2f64(<4 x double> %a, <2 x double> %b) #0 {
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; CHECK-LABEL: @src_ins3_v4f64_ext1_v2f64(
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; CHECK-NEXT: [[EXT:%.*]] = extractelement <2 x double> [[B:%.*]], i32 1
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; CHECK-NEXT: [[INS:%.*]] = insertelement <4 x double> poison, double [[EXT]], i32 3
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; CHECK-NEXT: ret <4 x double> [[INS]]
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;
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%ext = extractelement <2 x double> %b, i32 1
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%ins = insertelement <4 x double> poison, double %ext, i32 3
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ret <4 x double> %ins
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}
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define <2 x double> @src_ins0_v2f64_ext0_v4f64(<2 x double> %a, <4 x double> %b) {
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; CHECK-LABEL: @src_ins0_v2f64_ext0_v4f64(
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; CHECK-NEXT: [[EXT:%.*]] = extractelement <4 x double> [[B:%.*]], i32 0
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; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x double> poison, double [[EXT]], i32 0
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; CHECK-NEXT: ret <2 x double> [[INS]]
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;
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%ext = extractelement <4 x double> %b, i32 0
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%ins = insertelement <2 x double> poison, double %ext, i32 0
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ret <2 x double> %ins
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}
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define <2 x double> @src_ins0_v2f64_ext1_v4f64(<2 x double> %a, <4 x double> %b) {
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; CHECK-LABEL: @src_ins0_v2f64_ext1_v4f64(
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; CHECK-NEXT: [[EXT:%.*]] = extractelement <4 x double> [[B:%.*]], i32 1
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; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x double> poison, double [[EXT]], i32 0
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; CHECK-NEXT: ret <2 x double> [[INS]]
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;
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%ext = extractelement <4 x double> %b, i32 1
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%ins = insertelement <2 x double> poison, double %ext, i32 0
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ret <2 x double> %ins
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}
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define <2 x double> @src_ins0_v2f64_ext2_v4f64(<2 x double> %a, <4 x double> %b) {
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; CHECK-LABEL: @src_ins0_v2f64_ext2_v4f64(
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; CHECK-NEXT: [[EXT:%.*]] = extractelement <4 x double> [[B:%.*]], i32 2
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; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x double> poison, double [[EXT]], i32 0
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; CHECK-NEXT: ret <2 x double> [[INS]]
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;
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%ext = extractelement <4 x double> %b, i32 2
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%ins = insertelement <2 x double> poison, double %ext, i32 0
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ret <2 x double> %ins
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}
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define <2 x double> @src_ins0_v2f64_ext3_v4f64(<2 x double> %a, <4 x double> %b) {
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; CHECK-LABEL: @src_ins0_v2f64_ext3_v4f64(
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; CHECK-NEXT: [[EXT:%.*]] = extractelement <4 x double> [[B:%.*]], i32 3
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; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x double> poison, double [[EXT]], i32 0
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; CHECK-NEXT: ret <2 x double> [[INS]]
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;
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%ext = extractelement <4 x double> %b, i32 3
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%ins = insertelement <2 x double> poison, double %ext, i32 0
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ret <2 x double> %ins
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}
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define <2 x double> @src_ins1_v2f64_ext0_v4f64(<2 x double> %a, <4 x double> %b) {
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; CHECK-LABEL: @src_ins1_v2f64_ext0_v4f64(
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; CHECK-NEXT: [[EXT:%.*]] = extractelement <4 x double> [[B:%.*]], i32 0
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; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x double> poison, double [[EXT]], i32 1
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; CHECK-NEXT: ret <2 x double> [[INS]]
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;
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%ext = extractelement <4 x double> %b, i32 0
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%ins = insertelement <2 x double> poison, double %ext, i32 1
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ret <2 x double> %ins
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}
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define <2 x double> @src_ins1_v2f64_ext1_v4f64(<2 x double> %a, <4 x double> %b) {
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; CHECK-LABEL: @src_ins1_v2f64_ext1_v4f64(
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; CHECK-NEXT: [[EXT:%.*]] = extractelement <4 x double> [[B:%.*]], i32 1
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; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x double> poison, double [[EXT]], i32 1
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; CHECK-NEXT: ret <2 x double> [[INS]]
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;
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%ext = extractelement <4 x double> %b, i32 1
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%ins = insertelement <2 x double> poison, double %ext, i32 1
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ret <2 x double> %ins
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}
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define <2 x double> @src_ins1_v2f64_ext2_v4f64(<2 x double> %a, <4 x double> %b) {
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; CHECK-LABEL: @src_ins1_v2f64_ext2_v4f64(
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; CHECK-NEXT: [[EXT:%.*]] = extractelement <4 x double> [[B:%.*]], i32 2
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; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x double> poison, double [[EXT]], i32 1
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; CHECK-NEXT: ret <2 x double> [[INS]]
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;
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%ext = extractelement <4 x double> %b, i32 2
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%ins = insertelement <2 x double> poison, double %ext, i32 1
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ret <2 x double> %ins
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}
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define <2 x double> @src_ins1_v2f64_ext3_v4f64(<2 x double> %a, <4 x double> %b) {
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; CHECK-LABEL: @src_ins1_v2f64_ext3_v4f64(
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; CHECK-NEXT: [[EXT:%.*]] = extractelement <4 x double> [[B:%.*]], i32 3
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; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x double> poison, double [[EXT]], i32 1
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; CHECK-NEXT: ret <2 x double> [[INS]]
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;
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%ext = extractelement <4 x double> %b, i32 3
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%ins = insertelement <2 x double> poison, double %ext, i32 1
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ret <2 x double> %ins
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}
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;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
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; AVX: {{.*}}
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; SSE: {{.*}}

‎llvm/test/Transforms/VectorCombine/X86/extract-insert-undef.ll

Lines changed: 184 additions & 0 deletions
Original file line numberDiff line numberDiff line change
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2+
; RUN: opt < %s -passes=vector-combine -S -mtriple=x86_64-- -mattr=SSE2 | FileCheck %s --check-prefixes=CHECK,SSE
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; RUN: opt < %s -passes=vector-combine -S -mtriple=x86_64-- -mattr=AVX2 | FileCheck %s --check-prefixes=CHECK,AVX
4+
5+
6+
define <4 x double> @src_ins0_v4f64_ext0_v2f64(<4 x double> %a, <2 x double> %b) #0 {
7+
; CHECK-LABEL: @src_ins0_v4f64_ext0_v2f64(
8+
; CHECK-NEXT: [[EXT:%.*]] = extractelement <2 x double> [[B:%.*]], i32 0
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; CHECK-NEXT: [[INS:%.*]] = insertelement <4 x double> undef, double [[EXT]], i32 0
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; CHECK-NEXT: ret <4 x double> [[INS]]
11+
;
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%ext = extractelement <2 x double> %b, i32 0
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%ins = insertelement <4 x double> undef, double %ext, i32 0
14+
ret <4 x double> %ins
15+
}
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define <4 x double> @src_ins1_v4f64_ext0_v2f64(<4 x double> %a, <2 x double> %b) #0 {
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; CHECK-LABEL: @src_ins1_v4f64_ext0_v2f64(
19+
; CHECK-NEXT: [[EXT:%.*]] = extractelement <2 x double> [[B:%.*]], i32 0
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; CHECK-NEXT: [[INS:%.*]] = insertelement <4 x double> undef, double [[EXT]], i32 1
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; CHECK-NEXT: ret <4 x double> [[INS]]
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;
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%ext = extractelement <2 x double> %b, i32 0
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%ins = insertelement <4 x double> undef, double %ext, i32 1
25+
ret <4 x double> %ins
26+
}
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define <4 x double> @src_ins2_v4f64_ext0_v2f64(<4 x double> %a, <2 x double> %b) #0 {
29+
; CHECK-LABEL: @src_ins2_v4f64_ext0_v2f64(
30+
; CHECK-NEXT: [[EXT:%.*]] = extractelement <2 x double> [[B:%.*]], i32 0
31+
; CHECK-NEXT: [[INS:%.*]] = insertelement <4 x double> undef, double [[EXT]], i32 2
32+
; CHECK-NEXT: ret <4 x double> [[INS]]
33+
;
34+
%ext = extractelement <2 x double> %b, i32 0
35+
%ins = insertelement <4 x double> undef, double %ext, i32 2
36+
ret <4 x double> %ins
37+
}
38+
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define <4 x double> @src_ins3_v4f64_ext0_v2f64(<4 x double> %a, <2 x double> %b) #0 {
40+
; CHECK-LABEL: @src_ins3_v4f64_ext0_v2f64(
41+
; CHECK-NEXT: [[EXT:%.*]] = extractelement <2 x double> [[B:%.*]], i32 0
42+
; CHECK-NEXT: [[INS:%.*]] = insertelement <4 x double> undef, double [[EXT]], i32 3
43+
; CHECK-NEXT: ret <4 x double> [[INS]]
44+
;
45+
%ext = extractelement <2 x double> %b, i32 0
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%ins = insertelement <4 x double> undef, double %ext, i32 3
47+
ret <4 x double> %ins
48+
}
49+
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define <4 x double> @src_ins0_v4f64_ext1_v2f64(<4 x double> %a, <2 x double> %b) #0 {
51+
; CHECK-LABEL: @src_ins0_v4f64_ext1_v2f64(
52+
; CHECK-NEXT: [[EXT:%.*]] = extractelement <2 x double> [[B:%.*]], i32 1
53+
; CHECK-NEXT: [[INS:%.*]] = insertelement <4 x double> undef, double [[EXT]], i32 0
54+
; CHECK-NEXT: ret <4 x double> [[INS]]
55+
;
56+
%ext = extractelement <2 x double> %b, i32 1
57+
%ins = insertelement <4 x double> undef, double %ext, i32 0
58+
ret <4 x double> %ins
59+
}
60+
61+
define <4 x double> @src_ins1_v4f64_ext1_v2f64(<4 x double> %a, <2 x double> %b) #0 {
62+
; CHECK-LABEL: @src_ins1_v4f64_ext1_v2f64(
63+
; CHECK-NEXT: [[EXT:%.*]] = extractelement <2 x double> [[B:%.*]], i32 1
64+
; CHECK-NEXT: [[INS:%.*]] = insertelement <4 x double> undef, double [[EXT]], i32 1
65+
; CHECK-NEXT: ret <4 x double> [[INS]]
66+
;
67+
%ext = extractelement <2 x double> %b, i32 1
68+
%ins = insertelement <4 x double> undef, double %ext, i32 1
69+
ret <4 x double> %ins
70+
}
71+
72+
define <4 x double> @src_ins2_v4f64_ext1_v2f64(<4 x double> %a, <2 x double> %b) #0 {
73+
; CHECK-LABEL: @src_ins2_v4f64_ext1_v2f64(
74+
; CHECK-NEXT: [[EXT:%.*]] = extractelement <2 x double> [[B:%.*]], i32 1
75+
; CHECK-NEXT: [[INS:%.*]] = insertelement <4 x double> undef, double [[EXT]], i32 2
76+
; CHECK-NEXT: ret <4 x double> [[INS]]
77+
;
78+
%ext = extractelement <2 x double> %b, i32 1
79+
%ins = insertelement <4 x double> undef, double %ext, i32 2
80+
ret <4 x double> %ins
81+
}
82+
83+
define <4 x double> @src_ins3_v4f64_ext1_v2f64(<4 x double> %a, <2 x double> %b) #0 {
84+
; CHECK-LABEL: @src_ins3_v4f64_ext1_v2f64(
85+
; CHECK-NEXT: [[EXT:%.*]] = extractelement <2 x double> [[B:%.*]], i32 1
86+
; CHECK-NEXT: [[INS:%.*]] = insertelement <4 x double> undef, double [[EXT]], i32 3
87+
; CHECK-NEXT: ret <4 x double> [[INS]]
88+
;
89+
%ext = extractelement <2 x double> %b, i32 1
90+
%ins = insertelement <4 x double> undef, double %ext, i32 3
91+
ret <4 x double> %ins
92+
}
93+
94+
define <2 x double> @src_ins0_v2f64_ext0_v4f64(<2 x double> %a, <4 x double> %b) {
95+
; CHECK-LABEL: @src_ins0_v2f64_ext0_v4f64(
96+
; CHECK-NEXT: [[EXT:%.*]] = extractelement <4 x double> [[B:%.*]], i32 0
97+
; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x double> undef, double [[EXT]], i32 0
98+
; CHECK-NEXT: ret <2 x double> [[INS]]
99+
;
100+
%ext = extractelement <4 x double> %b, i32 0
101+
%ins = insertelement <2 x double> undef, double %ext, i32 0
102+
ret <2 x double> %ins
103+
}
104+
105+
define <2 x double> @src_ins0_v2f64_ext1_v4f64(<2 x double> %a, <4 x double> %b) {
106+
; CHECK-LABEL: @src_ins0_v2f64_ext1_v4f64(
107+
; CHECK-NEXT: [[EXT:%.*]] = extractelement <4 x double> [[B:%.*]], i32 1
108+
; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x double> undef, double [[EXT]], i32 0
109+
; CHECK-NEXT: ret <2 x double> [[INS]]
110+
;
111+
%ext = extractelement <4 x double> %b, i32 1
112+
%ins = insertelement <2 x double> undef, double %ext, i32 0
113+
ret <2 x double> %ins
114+
}
115+
116+
define <2 x double> @src_ins0_v2f64_ext2_v4f64(<2 x double> %a, <4 x double> %b) {
117+
; CHECK-LABEL: @src_ins0_v2f64_ext2_v4f64(
118+
; CHECK-NEXT: [[EXT:%.*]] = extractelement <4 x double> [[B:%.*]], i32 2
119+
; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x double> undef, double [[EXT]], i32 0
120+
; CHECK-NEXT: ret <2 x double> [[INS]]
121+
;
122+
%ext = extractelement <4 x double> %b, i32 2
123+
%ins = insertelement <2 x double> undef, double %ext, i32 0
124+
ret <2 x double> %ins
125+
}
126+
127+
define <2 x double> @src_ins0_v2f64_ext3_v4f64(<2 x double> %a, <4 x double> %b) {
128+
; CHECK-LABEL: @src_ins0_v2f64_ext3_v4f64(
129+
; CHECK-NEXT: [[EXT:%.*]] = extractelement <4 x double> [[B:%.*]], i32 3
130+
; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x double> undef, double [[EXT]], i32 0
131+
; CHECK-NEXT: ret <2 x double> [[INS]]
132+
;
133+
%ext = extractelement <4 x double> %b, i32 3
134+
%ins = insertelement <2 x double> undef, double %ext, i32 0
135+
ret <2 x double> %ins
136+
}
137+
138+
define <2 x double> @src_ins1_v2f64_ext0_v4f64(<2 x double> %a, <4 x double> %b) {
139+
; CHECK-LABEL: @src_ins1_v2f64_ext0_v4f64(
140+
; CHECK-NEXT: [[EXT:%.*]] = extractelement <4 x double> [[B:%.*]], i32 0
141+
; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x double> undef, double [[EXT]], i32 1
142+
; CHECK-NEXT: ret <2 x double> [[INS]]
143+
;
144+
%ext = extractelement <4 x double> %b, i32 0
145+
%ins = insertelement <2 x double> undef, double %ext, i32 1
146+
ret <2 x double> %ins
147+
}
148+
149+
define <2 x double> @src_ins1_v2f64_ext1_v4f64(<2 x double> %a, <4 x double> %b) {
150+
; CHECK-LABEL: @src_ins1_v2f64_ext1_v4f64(
151+
; CHECK-NEXT: [[EXT:%.*]] = extractelement <4 x double> [[B:%.*]], i32 1
152+
; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x double> undef, double [[EXT]], i32 1
153+
; CHECK-NEXT: ret <2 x double> [[INS]]
154+
;
155+
%ext = extractelement <4 x double> %b, i32 1
156+
%ins = insertelement <2 x double> undef, double %ext, i32 1
157+
ret <2 x double> %ins
158+
}
159+
160+
define <2 x double> @src_ins1_v2f64_ext2_v4f64(<2 x double> %a, <4 x double> %b) {
161+
; CHECK-LABEL: @src_ins1_v2f64_ext2_v4f64(
162+
; CHECK-NEXT: [[EXT:%.*]] = extractelement <4 x double> [[B:%.*]], i32 2
163+
; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x double> undef, double [[EXT]], i32 1
164+
; CHECK-NEXT: ret <2 x double> [[INS]]
165+
;
166+
%ext = extractelement <4 x double> %b, i32 2
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%ins = insertelement <2 x double> undef, double %ext, i32 1
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ret <2 x double> %ins
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}
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define <2 x double> @src_ins1_v2f64_ext3_v4f64(<2 x double> %a, <4 x double> %b) {
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; CHECK-LABEL: @src_ins1_v2f64_ext3_v4f64(
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; CHECK-NEXT: [[EXT:%.*]] = extractelement <4 x double> [[B:%.*]], i32 3
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; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x double> undef, double [[EXT]], i32 1
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; CHECK-NEXT: ret <2 x double> [[INS]]
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;
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%ext = extractelement <4 x double> %b, i32 3
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%ins = insertelement <2 x double> undef, double %ext, i32 1
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ret <2 x double> %ins
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}
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;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
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; AVX: {{.*}}
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; SSE: {{.*}}

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