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PreISelIntrinsicLowering: Lower llvm.exp/llvm.exp2 to a loop if scalable vec arg
If the argument to the intrinsic call to llvm.exp and llvm.exp2 is a scalable vector, lower it into a loop in PreISelIntrinsicLowering. If it is a fixed vector, let SelectionDAG handle it.
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llvm/include/llvm/Analysis/TargetLibraryInfo.h

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@@ -10,6 +10,7 @@
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#define LLVM_ANALYSIS_TARGETLIBRARYINFO_H
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#include "llvm/ADT/DenseMap.h"
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#include "llvm/CodeGen/ISDOpcodes.h"
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#include "llvm/IR/Constants.h"
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#include "llvm/IR/InstrTypes.h"
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#include "llvm/IR/Module.h"
@@ -457,6 +458,21 @@ class TargetLibraryInfo {
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return Impl->CustomNames.find(F)->second;
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}
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static unsigned getISDNode(Intrinsic::ID ID) {
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unsigned Node;
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switch (ID) {
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case Intrinsic::exp:
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Node = ISD::FEXP;
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break;
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case Intrinsic::exp2:
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Node = ISD::FEXP2;
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break;
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default:
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llvm_unreachable("Intrinsic ID not supported yet");
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}
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return Node;
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}
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static void initExtensionsForTriple(bool &ShouldExtI32Param,
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bool &ShouldExtI32Return,
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bool &ShouldSignExtI32Param,
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//===- llvm/Transforms/Utils/LowerVectorIntrinsics.h ------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// Lower intrinsics with a scalable vector arg to loops.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_TRANSFORMS_UTILS_LOWERVECTORINTRINSICS_H
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#define LLVM_TRANSFORMS_UTILS_LOWERVECTORINTRINSICS_H
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#include <cstdint>
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#include <optional>
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namespace llvm {
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class CallInst;
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class Module;
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/// Lower \p CI as a loop. \p CI is a unary intrinsic with a vector argument and
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/// is deleted and replaced with a loop.
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bool lowerUnaryVectorIntrinsicAsLoop(Module &M, CallInst *CI);
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} // namespace llvm
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#endif

llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp

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@@ -33,6 +33,7 @@
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Transforms/Scalar/LowerConstantIntrinsics.h"
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#include "llvm/Transforms/Utils/LowerMemIntrinsics.h"
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#include "llvm/Transforms/Utils/LowerVectorIntrinsics.h"
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using namespace llvm;
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@@ -453,6 +454,19 @@ bool PreISelIntrinsicLowering::lowerIntrinsics(Module &M) const {
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case Intrinsic::objc_sync_exit:
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Changed |= lowerObjCCall(F, "objc_sync_exit");
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break;
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case Intrinsic::exp:
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case Intrinsic::exp2:
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Changed |= forEachCall(F, [&](CallInst *CI) {
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Type *Ty = CI->getArgOperand(0)->getType();
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if (!isa<ScalableVectorType>(Ty))
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return false;
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const TargetLowering *TL = TM->getSubtargetImpl(F)->getTargetLowering();
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unsigned Op = TargetLibraryInfo::getISDNode(F.getIntrinsicID());
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if (!TL->isOperationExpand(Op, EVT::getEVT(Ty)))
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return false;
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return lowerUnaryVectorIntrinsicAsLoop(M, CI);
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});
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break;
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}
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}
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return Changed;

llvm/lib/Transforms/Utils/CMakeLists.txt

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@@ -56,6 +56,7 @@ add_llvm_component_library(LLVMTransformUtils
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LowerInvoke.cpp
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LowerMemIntrinsics.cpp
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LowerSwitch.cpp
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LowerVectorIntrinsics.cpp
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MatrixUtils.cpp
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MemoryOpRemark.cpp
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MemoryTaggingSupport.cpp
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//===- LowerVectorIntrinsics.cpp ------------------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/Transforms/Utils/LowerVectorIntrinsics.h"
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#include "llvm/IR/IRBuilder.h"
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#include "llvm/IR/IntrinsicInst.h"
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#include "llvm/Support/Debug.h"
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#define DEBUG_TYPE "lower-vector-intrinsics"
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using namespace llvm;
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bool llvm::lowerUnaryVectorIntrinsicAsLoop(Module &M, CallInst *CI) {
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Type *ArgTy = CI->getArgOperand(0)->getType();
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VectorType *VecTy = cast<VectorType>(ArgTy);
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BasicBlock *PreLoopBB = CI->getParent();
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BasicBlock *PostLoopBB = nullptr;
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Function *ParentFunc = PreLoopBB->getParent();
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LLVMContext &Ctx = PreLoopBB->getContext();
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PostLoopBB = PreLoopBB->splitBasicBlock(CI);
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BasicBlock *LoopBB = BasicBlock::Create(Ctx, "", ParentFunc, PostLoopBB);
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PreLoopBB->getTerminator()->setSuccessor(0, LoopBB);
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// Loop preheader
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IRBuilder<> PreLoopBuilder(PreLoopBB->getTerminator());
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Value *LoopEnd = nullptr;
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if (auto *ScalableVecTy = dyn_cast<ScalableVectorType>(VecTy)) {
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Value *VScale = PreLoopBuilder.CreateVScale(
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ConstantInt::get(PreLoopBuilder.getInt64Ty(), 1));
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Value *N = ConstantInt::get(PreLoopBuilder.getInt64Ty(),
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ScalableVecTy->getMinNumElements());
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LoopEnd = PreLoopBuilder.CreateMul(VScale, N);
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} else {
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FixedVectorType *FixedVecTy = cast<FixedVectorType>(VecTy);
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LoopEnd = ConstantInt::get(PreLoopBuilder.getInt64Ty(),
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FixedVecTy->getNumElements());
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}
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// Loop body
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IRBuilder<> LoopBuilder(LoopBB);
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Type *Int64Ty = LoopBuilder.getInt64Ty();
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PHINode *LoopIndex = LoopBuilder.CreatePHI(Int64Ty, 2);
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LoopIndex->addIncoming(ConstantInt::get(Int64Ty, 0U), PreLoopBB);
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PHINode *Vec = LoopBuilder.CreatePHI(VecTy, 2);
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Vec->addIncoming(CI->getArgOperand(0), PreLoopBB);
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Value *Elem = LoopBuilder.CreateExtractElement(Vec, LoopIndex);
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Function *Exp = Intrinsic::getOrInsertDeclaration(&M, CI->getIntrinsicID(),
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VecTy->getElementType());
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Value *Res = LoopBuilder.CreateCall(Exp, Elem);
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Value *NewVec = LoopBuilder.CreateInsertElement(Vec, Res, LoopIndex);
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Vec->addIncoming(NewVec, LoopBB);
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Value *One = ConstantInt::get(Int64Ty, 1U);
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Value *NextLoopIndex = LoopBuilder.CreateAdd(LoopIndex, One);
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LoopIndex->addIncoming(NextLoopIndex, LoopBB);
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Value *ExitCond =
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LoopBuilder.CreateICmp(CmpInst::ICMP_EQ, NextLoopIndex, LoopEnd);
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LoopBuilder.CreateCondBr(ExitCond, PostLoopBB, LoopBB);
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CI->replaceAllUsesWith(NewVec);
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CI->eraseFromParent();
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return true;
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}
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
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; RUN: opt -passes=pre-isel-intrinsic-lowering -S < %s | FileCheck %s
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target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32"
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target triple = "aarch64"
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define <vscale x 4 x float> @scalable_vec_exp(<vscale x 4 x float> %input) {
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; CHECK-LABEL: define <vscale x 4 x float> @scalable_vec_exp(
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; CHECK-SAME: <vscale x 4 x float> [[INPUT:%.*]]) {
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; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.vscale.i64()
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; CHECK-NEXT: [[TMP2:%.*]] = mul i64 [[TMP1]], 4
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; CHECK-NEXT: br label %[[BB3:.*]]
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; CHECK: [[BB3]]:
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; CHECK-NEXT: [[TMP4:%.*]] = phi i64 [ 0, [[TMP0:%.*]] ], [ [[TMP9:%.*]], %[[BB3]] ]
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; CHECK-NEXT: [[TMP5:%.*]] = phi <vscale x 4 x float> [ [[INPUT]], [[TMP0]] ], [ [[TMP8:%.*]], %[[BB3]] ]
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; CHECK-NEXT: [[TMP6:%.*]] = extractelement <vscale x 4 x float> [[TMP5]], i64 [[TMP4]]
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; CHECK-NEXT: [[TMP7:%.*]] = call float @llvm.exp.f32(float [[TMP6]])
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; CHECK-NEXT: [[TMP8]] = insertelement <vscale x 4 x float> [[TMP5]], float [[TMP7]], i64 [[TMP4]]
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; CHECK-NEXT: [[TMP9]] = add i64 [[TMP4]], 1
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; CHECK-NEXT: [[TMP10:%.*]] = icmp eq i64 [[TMP9]], [[TMP2]]
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; CHECK-NEXT: br i1 [[TMP10]], label %[[BB11:.*]], label %[[BB3]]
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; CHECK: [[BB11]]:
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; CHECK-NEXT: ret <vscale x 4 x float> [[TMP8]]
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;
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%output = call <vscale x 4 x float> @llvm.exp.nxv4f32(<vscale x 4 x float> %input)
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ret <vscale x 4 x float> %output
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}
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define <4 x float> @fixed_vec_exp(<4 x float> %input) {
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; CHECK-LABEL: define <4 x float> @fixed_vec_exp(
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; CHECK-SAME: <4 x float> [[INPUT:%.*]]) {
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; CHECK-NEXT: [[OUTPUT:%.*]] = call <4 x float> @llvm.exp.v4f32(<4 x float> [[INPUT]])
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; CHECK-NEXT: ret <4 x float> [[OUTPUT]]
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;
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%output = call <4 x float> @llvm.exp.v4f32(<4 x float> %input)
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ret <4 x float> %output
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}
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declare <4 x float> @llvm.exp.v4f32(<4 x float>) #0
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declare <vscale x 4 x float> @llvm.exp.nxv4f32(<vscale x 4 x float>) #0
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; CHECK: attributes #0 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
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; CHECK-NEXT: attributes #1 = { nocallback nofree nosync nounwind willreturn memory(none) }
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attributes #0 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
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if not "AArch64" in config.root.targets:
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config.unsupported = True

llvm/utils/gn/secondary/llvm/lib/Transforms/Utils/BUILD.gn

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@@ -64,6 +64,7 @@ static_library("Utils") {
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"LowerInvoke.cpp",
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"LowerMemIntrinsics.cpp",
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"LowerSwitch.cpp",
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"LowerVectorIntrinsics.cpp",
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"MatrixUtils.cpp",
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"Mem2Reg.cpp",
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"MemoryOpRemark.cpp",

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