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Update O3-pipeline.ll
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llvm/test/CodeGen/RISCV/O3-pipeline.ll

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@@ -144,7 +144,6 @@
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; CHECK-NEXT: Greedy Register Allocator
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; CHECK-NEXT: Virtual Register Rewriter
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; CHECK-NEXT: RISC-V Coalesce VSETVLI pass
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; CHECK-NEXT: Debug Variable Analysis
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; CHECK-NEXT: Virtual Register Map
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; CHECK-NEXT: Live Register Matrix
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; CHECK-NEXT: Greedy Register Allocator

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