[Sparc] Fix disassembly of popc instruction.

And add tests.

Patch by David Wiberg!

llvm-svn: 244064

Author: jyknight

llvm/lib/Target/Sparc/SparcInstrInfo.td

@@ -1221,8 +1221,8 @@ let Predicates = [HasV9] in {
 // the top 32-bits before using it.  To do this clearing, we use a SRLri X,0.
 let rs1 = 0 in
   def POPCrr : F3_1<2, 0b101110,
-                    (outs IntRegs:$dst), (ins IntRegs:$src),
-                    "popc $src, $dst", []>, Requires<[HasV9]>;
+                    (outs IntRegs:$rd), (ins IntRegs:$rs2),
+                    "popc $rs2, $rd", []>, Requires<[HasV9]>;
 def : Pat<(ctpop i32:$src),
           (POPCrr (SRLri $src, 0))>;
 

llvm/test/MC/Disassembler/Sparc/sparc-v9.txt

@@ -0,0 +1,4 @@
+# RUN: llvm-mc --disassemble %s -triple=sparcv9-unknown-linux | FileCheck %s
+
+# CHECK: popc %g1, %g2
+0x85 0x70 0x00 0x01

llvm/test/MC/Sparc/sparcv9-instructions.s

@@ -21,3 +21,8 @@
         ! V9:      subxcc %g1, %g2, %g3         ! encoding: [0x86,0xe0,0x40,0x02]
         subccc %g1, %g2, %g3
 
+        ! V8:      error: instruction requires a CPU feature not currently enabled
+        ! V8-NEXT: popc %g1, %g2
+        ! V9:      popc %g1, %g2                ! encoding: [0x85,0x70,0x00,0x01]
+        popc %g1, %g2
+