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diggerlindiggerlin
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change test cases based on the new behavious and run the update_llc_test_checks.py
1 parent 579f7dd commit bcfc75f

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5 files changed

+1005
-1085
lines changed

5 files changed

+1005
-1085
lines changed

‎llvm/lib/Target/PowerPC/PPCMIPeephole.cpp

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1292,6 +1292,10 @@ bool PPCMIPeephole::simplifyCode() {
12921292
unsigned MB = MI.getOperand(3).getImm();
12931293
unsigned ME = MI.getOperand(4).getImm();
12941294

1295+
// LBARX already sets the upper 24 bits of the destination register
1296+
// to zero. If the register is cleared to zero in the upper 24 bits
1297+
// using RLWINM later, we eliminate the RLWINM. Same applies to
1298+
// LHARX.
12951299
if (SH == 0 && ME == 31 &&
12961300
((MB == 24 && Opcode == PPC::LBARX) ||
12971301
(MB == 16 && Opcode == PPC::LHARX))) {

‎llvm/test/CodeGen/PowerPC/PR35812-neg-cmpxchg.ll

Lines changed: 45 additions & 47 deletions
Original file line numberDiff line numberDiff line change
@@ -18,54 +18,52 @@ define signext i32 @main() nounwind {
1818
; CHECK-NEXT: sth 3, 46(1)
1919
; CHECK-NEXT: addi 3, 1, 46
2020
; CHECK-NEXT: lharx 4, 0, 3
21-
; CHECK-NEXT: clrlwi 4, 4, 16
22-
; CHECK-NEXT: cmplwi 4, 33059
23-
; CHECK-NEXT: bne 0, .LBB0_4
24-
; CHECK-NEXT: # %bb.1: # %cmpxchg.fencedstore
21+
; CHECK-NEXT: cmplwi 4, 33059
22+
; CHECK-NEXT: bne 0, .LBB0_4
23+
; CHECK-NEXT: # %bb.1: # %cmpxchg.fencedstore
2524
; CHECK-NEXT: sync
2625
; CHECK-NEXT: li 4, 234
27-
; CHECK-NEXT: .p2align 5
28-
; CHECK-NEXT: .LBB0_2: # %cmpxchg.trystore
29-
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
26+
; CHECK-NEXT: .p2align 5
27+
; CHECK-NEXT: .LBB0_2: # %cmpxchg.trystore
28+
; CHECK-NEXT: #
3029
; CHECK-NEXT: sthcx. 4, 0, 3
31-
; CHECK-NEXT: beq 0, .LBB0_7
32-
; CHECK-NEXT: # %bb.3: # %cmpxchg.releasedload
33-
; CHECK-NEXT: # in Loop: Header=BB0_2 Depth=1
30+
; CHECK-NEXT: beq 0, .LBB0_7
31+
; CHECK-NEXT: # %bb.3: # %cmpxchg.releasedload
32+
; CHECK-NEXT: #
3433
; CHECK-NEXT: lharx 5, 0, 3
35-
; CHECK-NEXT: clrlwi 5, 5, 16
36-
; CHECK-NEXT: cmplwi 5, 33059
37-
; CHECK-NEXT: beq 0, .LBB0_2
38-
; CHECK-NEXT: .LBB0_4: # %cmpxchg.nostore
34+
; CHECK-NEXT: cmplwi 5, 33059
35+
; CHECK-NEXT: beq 0, .LBB0_2
36+
; CHECK-NEXT: .LBB0_4: # %cmpxchg.nostore
3937
; CHECK-NEXT: lwsync
4038
; CHECK-NEXT: b .LBB0_8
41-
; CHECK-NEXT: .LBB0_5: # %L.B0000
39+
; CHECK-NEXT: .LBB0_5: # %L.B0000
4240
; CHECK-NEXT: lhz 3, 46(1)
43-
; CHECK-NEXT: cmplwi 3, 234
44-
; CHECK-NEXT: bne 0, .LBB0_9
45-
; CHECK-NEXT: # %bb.6: # %L.B0001
41+
; CHECK-NEXT: cmplwi 3, 234
42+
; CHECK-NEXT: bne 0, .LBB0_9
43+
; CHECK-NEXT: # %bb.6: # %L.B0001
4644
; CHECK-NEXT: addis 3, 2, .L_MergedGlobals@toc@ha
4745
; CHECK-NEXT: addi 3, 3, .L_MergedGlobals@toc@l
4846
; CHECK-NEXT: bl puts
4947
; CHECK-NEXT: nop
5048
; CHECK-NEXT: li 3, 0
5149
; CHECK-NEXT: b .LBB0_11
52-
; CHECK-NEXT: .LBB0_7: # %cmpxchg.success
50+
; CHECK-NEXT: .LBB0_7: # %cmpxchg.success
5351
; CHECK-NEXT: lwsync
5452
; CHECK-NEXT: b .LBB0_5
55-
; CHECK-NEXT: .LBB0_8: # %L.B0003
53+
; CHECK-NEXT: .LBB0_8: # %L.B0003
5654
; CHECK-NEXT: addis 3, 2, .L_MergedGlobals@toc@ha
5755
; CHECK-NEXT: addi 3, 3, .L_MergedGlobals@toc@l
5856
; CHECK-NEXT: addi 3, 3, 16
5957
; CHECK-NEXT: b .LBB0_10
60-
; CHECK-NEXT: .LBB0_9: # %L.B0005
58+
; CHECK-NEXT: .LBB0_9: # %L.B0005
6159
; CHECK-NEXT: addis 3, 2, .L_MergedGlobals@toc@ha
6260
; CHECK-NEXT: addi 3, 3, .L_MergedGlobals@toc@l
6361
; CHECK-NEXT: addi 3, 3, 64
64-
; CHECK-NEXT: .LBB0_10: # %L.B0003
62+
; CHECK-NEXT: .LBB0_10: # %L.B0003
6563
; CHECK-NEXT: bl puts
6664
; CHECK-NEXT: nop
6765
; CHECK-NEXT: li 3, 1
68-
; CHECK-NEXT: .LBB0_11: # %L.B0003
66+
; CHECK-NEXT: .LBB0_11: # %L.B0003
6967
; CHECK-NEXT: addi 1, 1, 48
7068
; CHECK-NEXT: ld 0, 16(1)
7169
; CHECK-NEXT: mtlr 0
@@ -83,62 +81,62 @@ define signext i32 @main() nounwind {
8381
; CHECK-P7-NEXT: rlwinm 4, 4, 3, 27, 27
8482
; CHECK-P7-NEXT: lwarx 5, 0, 3
8583
; CHECK-P7-NEXT: srw 6, 5, 4
86-
; CHECK-P7-NEXT: clrlwi 6, 6, 16
87-
; CHECK-P7-NEXT: cmplwi 6, 33059
88-
; CHECK-P7-NEXT: bne 0, .LBB0_4
89-
; CHECK-P7-NEXT: # %bb.1: # %cmpxchg.fencedstore
84+
; CHECK-P7-NEXT: clrlwi 6, 6, 16
85+
; CHECK-P7-NEXT: cmplwi 6, 33059
86+
; CHECK-P7-NEXT: bne 0, .LBB0_4
87+
; CHECK-P7-NEXT: # %bb.1: # %cmpxchg.fencedstore
9088
; CHECK-P7-NEXT: lis 6, 0
9189
; CHECK-P7-NEXT: li 7, 234
9290
; CHECK-P7-NEXT: sync
9391
; CHECK-P7-NEXT: ori 6, 6, 65535
9492
; CHECK-P7-NEXT: slw 7, 7, 4
9593
; CHECK-P7-NEXT: slw 6, 6, 4
96-
; CHECK-P7-NEXT: not 6, 6
97-
; CHECK-P7-NEXT: .p2align 4
98-
; CHECK-P7-NEXT: .LBB0_2: # %cmpxchg.trystore
99-
; CHECK-P7-NEXT: # =>This Inner Loop Header: Depth=1
94+
; CHECK-P7-NEXT: not 6, 6
95+
; CHECK-P7-NEXT: .p2align 4
96+
; CHECK-P7-NEXT: .LBB0_2: # %cmpxchg.trystore
97+
; CHECK-P7-NEXT: #
10098
; CHECK-P7-NEXT: and 5, 5, 6
10199
; CHECK-P7-NEXT: or 5, 5, 7
102100
; CHECK-P7-NEXT: stwcx. 5, 0, 3
103-
; CHECK-P7-NEXT: beq 0, .LBB0_7
104-
; CHECK-P7-NEXT: # %bb.3: # %cmpxchg.releasedload
105-
; CHECK-P7-NEXT: # in Loop: Header=BB0_2 Depth=1
101+
; CHECK-P7-NEXT: beq 0, .LBB0_7
102+
; CHECK-P7-NEXT: # %bb.3: # %cmpxchg.releasedload
103+
; CHECK-P7-NEXT: #
106104
; CHECK-P7-NEXT: lwarx 5, 0, 3
107105
; CHECK-P7-NEXT: srw 8, 5, 4
108-
; CHECK-P7-NEXT: clrlwi 8, 8, 16
109-
; CHECK-P7-NEXT: cmplwi 8, 33059
110-
; CHECK-P7-NEXT: beq 0, .LBB0_2
111-
; CHECK-P7-NEXT: .LBB0_4: # %cmpxchg.nostore
106+
; CHECK-P7-NEXT: clrlwi 8, 8, 16
107+
; CHECK-P7-NEXT: cmplwi 8, 33059
108+
; CHECK-P7-NEXT: beq 0, .LBB0_2
109+
; CHECK-P7-NEXT: .LBB0_4: # %cmpxchg.nostore
112110
; CHECK-P7-NEXT: lwsync
113111
; CHECK-P7-NEXT: b .LBB0_8
114-
; CHECK-P7-NEXT: .LBB0_5: # %L.B0000
112+
; CHECK-P7-NEXT: .LBB0_5: # %L.B0000
115113
; CHECK-P7-NEXT: lhz 3, 46(1)
116-
; CHECK-P7-NEXT: cmplwi 3, 234
117-
; CHECK-P7-NEXT: bne 0, .LBB0_9
118-
; CHECK-P7-NEXT: # %bb.6: # %L.B0001
114+
; CHECK-P7-NEXT: cmplwi 3, 234
115+
; CHECK-P7-NEXT: bne 0, .LBB0_9
116+
; CHECK-P7-NEXT: # %bb.6: # %L.B0001
119117
; CHECK-P7-NEXT: addis 3, 2, .L_MergedGlobals@toc@ha
120118
; CHECK-P7-NEXT: addi 3, 3, .L_MergedGlobals@toc@l
121119
; CHECK-P7-NEXT: bl puts
122120
; CHECK-P7-NEXT: nop
123121
; CHECK-P7-NEXT: li 3, 0
124122
; CHECK-P7-NEXT: b .LBB0_11
125-
; CHECK-P7-NEXT: .LBB0_7: # %cmpxchg.success
123+
; CHECK-P7-NEXT: .LBB0_7: # %cmpxchg.success
126124
; CHECK-P7-NEXT: lwsync
127125
; CHECK-P7-NEXT: b .LBB0_5
128-
; CHECK-P7-NEXT: .LBB0_8: # %L.B0003
126+
; CHECK-P7-NEXT: .LBB0_8: # %L.B0003
129127
; CHECK-P7-NEXT: addis 3, 2, .L_MergedGlobals@toc@ha
130128
; CHECK-P7-NEXT: addi 3, 3, .L_MergedGlobals@toc@l
131129
; CHECK-P7-NEXT: addi 3, 3, 16
132130
; CHECK-P7-NEXT: b .LBB0_10
133-
; CHECK-P7-NEXT: .LBB0_9: # %L.B0005
131+
; CHECK-P7-NEXT: .LBB0_9: # %L.B0005
134132
; CHECK-P7-NEXT: addis 3, 2, .L_MergedGlobals@toc@ha
135133
; CHECK-P7-NEXT: addi 3, 3, .L_MergedGlobals@toc@l
136134
; CHECK-P7-NEXT: addi 3, 3, 64
137-
; CHECK-P7-NEXT: .LBB0_10: # %L.B0003
135+
; CHECK-P7-NEXT: .LBB0_10: # %L.B0003
138136
; CHECK-P7-NEXT: bl puts
139137
; CHECK-P7-NEXT: nop
140138
; CHECK-P7-NEXT: li 3, 1
141-
; CHECK-P7-NEXT: .LBB0_11: # %L.B0003
139+
; CHECK-P7-NEXT: .LBB0_11: # %L.B0003
142140
; CHECK-P7-NEXT: addi 1, 1, 48
143141
; CHECK-P7-NEXT: ld 0, 16(1)
144142
; CHECK-P7-NEXT: mtlr 0

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