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[InstCombine] Swap out range metadata to range attribute for cttz/ctlz/ctpop
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45 files changed

+465
-467
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‎llvm/include/llvm/IR/Attributes.h

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -747,6 +747,11 @@ class AttributeList {
747747
addDereferenceableOrNullParamAttr(LLVMContext &C, unsigned ArgNo,
748748
uint64_t Bytes) const;
749749

750+
/// Add the range attribute to the attribute set at the return value index.
751+
/// Returns a new list because attribute lists are immutable.
752+
[[nodiscard]] AttributeList addRangeRetAttr(LLVMContext &C,
753+
const ConstantRange &CR) const;
754+
750755
/// Add the allocsize attribute to the attribute set at the given arg index.
751756
/// Returns a new list because attribute lists are immutable.
752757
[[nodiscard]] AttributeList

‎llvm/include/llvm/IR/InstrTypes.h

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1941,6 +1941,11 @@ class CallBase : public Instruction {
19411941
Attrs = Attrs.addDereferenceableRetAttr(getContext(), Bytes);
19421942
}
19431943

1944+
/// adds the range attribute to the list of attributes.
1945+
void addRangeRetAttr(const ConstantRange &CR) {
1946+
Attrs = Attrs.addRangeRetAttr(getContext(), CR);
1947+
}
1948+
19441949
/// Determine whether the return value has the given attribute.
19451950
bool hasRetAttr(Attribute::AttrKind Kind) const {
19461951
return hasRetAttrImpl(Kind);

‎llvm/lib/IR/Attributes.cpp

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1530,6 +1530,13 @@ AttributeList::addDereferenceableOrNullParamAttr(LLVMContext &C, unsigned Index,
15301530
return addParamAttributes(C, Index, B);
15311531
}
15321532

1533+
AttributeList AttributeList::addRangeRetAttr(LLVMContext &C,
1534+
const ConstantRange &CR) const {
1535+
AttrBuilder B(C);
1536+
B.addRangeAttr(CR);
1537+
return addRetAttributes(C, B);
1538+
}
1539+
15331540
AttributeList AttributeList::addAllocSizeParamAttr(
15341541
LLVMContext &C, unsigned Index, unsigned ElemSizeArg,
15351542
const std::optional<unsigned> &NumElemsArg) {

‎llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp

Lines changed: 13 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -606,14 +606,13 @@ static Instruction *foldCttzCtlz(IntrinsicInst &II, InstCombinerImpl &IC) {
606606
return IC.replaceOperand(II, 1, IC.Builder.getTrue());
607607
}
608608

609-
// Add range metadata since known bits can't completely reflect what we know.
610-
auto *IT = cast<IntegerType>(Op0->getType()->getScalarType());
611-
if (IT && IT->getBitWidth() != 1 && !II.getMetadata(LLVMContext::MD_range)) {
612-
Metadata *LowAndHigh[] = {
613-
ConstantAsMetadata::get(ConstantInt::get(IT, DefiniteZeros)),
614-
ConstantAsMetadata::get(ConstantInt::get(IT, PossibleZeros + 1))};
615-
II.setMetadata(LLVMContext::MD_range,
616-
MDNode::get(II.getContext(), LowAndHigh));
609+
// Add range attribute since known bits can't completely reflect what we know.
610+
unsigned BitWidth = Op0->getType()->getScalarSizeInBits();
611+
if (BitWidth != 1 && !II.hasRetAttr(Attribute::Range) &&
612+
!II.getMetadata(LLVMContext::MD_range)) {
613+
ConstantRange Range(APInt(BitWidth, DefiniteZeros),
614+
APInt(BitWidth, PossibleZeros + 1));
615+
II.addRangeRetAttr(Range);
617616
return &II;
618617
}
619618

@@ -685,16 +684,12 @@ static Instruction *foldCtpop(IntrinsicInst &II, InstCombinerImpl &IC) {
685684
Constant::getNullValue(Ty)),
686685
Ty);
687686

688-
// Add range metadata since known bits can't completely reflect what we know.
689-
auto *IT = cast<IntegerType>(Ty->getScalarType());
690-
unsigned MinCount = Known.countMinPopulation();
691-
unsigned MaxCount = Known.countMaxPopulation();
692-
if (IT->getBitWidth() != 1 && !II.getMetadata(LLVMContext::MD_range)) {
693-
Metadata *LowAndHigh[] = {
694-
ConstantAsMetadata::get(ConstantInt::get(IT, MinCount)),
695-
ConstantAsMetadata::get(ConstantInt::get(IT, MaxCount + 1))};
696-
II.setMetadata(LLVMContext::MD_range,
697-
MDNode::get(II.getContext(), LowAndHigh));
687+
// Add range attribute since known bits can't completely reflect what we know.
688+
if (BitWidth != 1 && !II.hasRetAttr(Attribute::Range) &&
689+
!II.getMetadata(LLVMContext::MD_range)) {
690+
ConstantRange Range(APInt(BitWidth, Known.countMinPopulation()),
691+
APInt(BitWidth, Known.countMaxPopulation() + 1));
692+
II.addRangeRetAttr(Range);
698693
return &II;
699694
}
700695

‎llvm/test/Transforms/InstCombine/bit_ceil.ll

Lines changed: 14 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -5,7 +5,7 @@
55
define i32 @bit_ceil_32(i32 %x) {
66
; CHECK-LABEL: @bit_ceil_32(
77
; CHECK-NEXT: [[DEC:%.*]] = add i32 [[X:%.*]], -1
8-
; CHECK-NEXT: [[CTLZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[DEC]], i1 false), !range [[RNG0:![0-9]+]]
8+
; CHECK-NEXT: [[CTLZ:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[DEC]], i1 false)
99
; CHECK-NEXT: [[TMP1:%.*]] = sub nsw i32 0, [[CTLZ]]
1010
; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], 31
1111
; CHECK-NEXT: [[SEL:%.*]] = shl nuw i32 1, [[TMP2]]
@@ -24,7 +24,7 @@ define i32 @bit_ceil_32(i32 %x) {
2424
define i64 @bit_ceil_64(i64 %x) {
2525
; CHECK-LABEL: @bit_ceil_64(
2626
; CHECK-NEXT: [[DEC:%.*]] = add i64 [[X:%.*]], -1
27-
; CHECK-NEXT: [[CTLZ:%.*]] = tail call i64 @llvm.ctlz.i64(i64 [[DEC]], i1 false), !range [[RNG1:![0-9]+]]
27+
; CHECK-NEXT: [[CTLZ:%.*]] = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 [[DEC]], i1 false)
2828
; CHECK-NEXT: [[TMP1:%.*]] = sub nsw i64 0, [[CTLZ]]
2929
; CHECK-NEXT: [[TMP2:%.*]] = and i64 [[TMP1]], 63
3030
; CHECK-NEXT: [[SEL:%.*]] = shl nuw i64 1, [[TMP2]]
@@ -44,7 +44,7 @@ define i32 @bit_ceil_32_minus_1(i32 %x) {
4444
; CHECK-LABEL: @bit_ceil_32_minus_1(
4545
; CHECK-NEXT: entry:
4646
; CHECK-NEXT: [[SUB:%.*]] = add i32 [[X:%.*]], -2
47-
; CHECK-NEXT: [[CTLZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[SUB]], i1 false), !range [[RNG0]]
47+
; CHECK-NEXT: [[CTLZ:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[SUB]], i1 false)
4848
; CHECK-NEXT: [[TMP0:%.*]] = sub nsw i32 0, [[CTLZ]]
4949
; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[TMP0]], 31
5050
; CHECK-NEXT: [[SEL:%.*]] = shl nuw i32 1, [[TMP1]]
@@ -64,7 +64,7 @@ entry:
6464
; std::bit_ceil<uint32_t>(x + 1)
6565
define i32 @bit_ceil_32_plus_1(i32 %x) {
6666
; CHECK-LABEL: @bit_ceil_32_plus_1(
67-
; CHECK-NEXT: [[CTLZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[X:%.*]], i1 false), !range [[RNG0]]
67+
; CHECK-NEXT: [[CTLZ:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[X:%.*]], i1 false)
6868
; CHECK-NEXT: [[TMP1:%.*]] = sub nsw i32 0, [[CTLZ]]
6969
; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], 31
7070
; CHECK-NEXT: [[SEL:%.*]] = shl nuw i32 1, [[TMP2]]
@@ -84,7 +84,7 @@ define i32 @bit_ceil_plus_2(i32 %x) {
8484
; CHECK-LABEL: @bit_ceil_plus_2(
8585
; CHECK-NEXT: entry:
8686
; CHECK-NEXT: [[SUB:%.*]] = add i32 [[X:%.*]], 1
87-
; CHECK-NEXT: [[CTLZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[SUB]], i1 false), !range [[RNG0]]
87+
; CHECK-NEXT: [[CTLZ:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[SUB]], i1 false)
8888
; CHECK-NEXT: [[TMP0:%.*]] = sub nsw i32 0, [[CTLZ]]
8989
; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[TMP0]], 31
9090
; CHECK-NEXT: [[SEL:%.*]] = shl nuw i32 1, [[TMP1]]
@@ -105,7 +105,7 @@ define i32 @bit_ceil_32_neg(i32 %x) {
105105
; CHECK-LABEL: @bit_ceil_32_neg(
106106
; CHECK-NEXT: entry:
107107
; CHECK-NEXT: [[SUB:%.*]] = xor i32 [[X:%.*]], -1
108-
; CHECK-NEXT: [[CTLZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[SUB]], i1 false), !range [[RNG0]]
108+
; CHECK-NEXT: [[CTLZ:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[SUB]], i1 false)
109109
; CHECK-NEXT: [[TMP0:%.*]] = sub nsw i32 0, [[CTLZ]]
110110
; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[TMP0]], 31
111111
; CHECK-NEXT: [[SEL:%.*]] = shl nuw i32 1, [[TMP1]]
@@ -127,7 +127,7 @@ define i32 @bit_ceil_not(i32 %x) {
127127
; CHECK-LABEL: @bit_ceil_not(
128128
; CHECK-NEXT: entry:
129129
; CHECK-NEXT: [[SUB:%.*]] = sub i32 -2, [[X:%.*]]
130-
; CHECK-NEXT: [[CTLZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[SUB]], i1 false), !range [[RNG0]]
130+
; CHECK-NEXT: [[CTLZ:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[SUB]], i1 false)
131131
; CHECK-NEXT: [[TMP0:%.*]] = sub nsw i32 0, [[CTLZ]]
132132
; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[TMP0]], 31
133133
; CHECK-NEXT: [[SEL:%.*]] = shl nuw i32 1, [[TMP1]]
@@ -147,7 +147,7 @@ entry:
147147
define i32 @bit_ceil_commuted_operands(i32 %x) {
148148
; CHECK-LABEL: @bit_ceil_commuted_operands(
149149
; CHECK-NEXT: [[DEC:%.*]] = add i32 [[X:%.*]], -1
150-
; CHECK-NEXT: [[CTLZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[DEC]], i1 false), !range [[RNG0]]
150+
; CHECK-NEXT: [[CTLZ:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[DEC]], i1 false)
151151
; CHECK-NEXT: [[SUB:%.*]] = sub nuw nsw i32 32, [[CTLZ]]
152152
; CHECK-NEXT: [[SHL:%.*]] = shl nuw i32 1, [[SUB]]
153153
; CHECK-NEXT: ret i32 [[SHL]]
@@ -165,7 +165,7 @@ define i32 @bit_ceil_commuted_operands(i32 %x) {
165165
define i32 @bit_ceil_wrong_select_constant(i32 %x) {
166166
; CHECK-LABEL: @bit_ceil_wrong_select_constant(
167167
; CHECK-NEXT: [[DEC:%.*]] = add i32 [[X:%.*]], -1
168-
; CHECK-NEXT: [[CTLZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[DEC]], i1 false), !range [[RNG0]]
168+
; CHECK-NEXT: [[CTLZ:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[DEC]], i1 false)
169169
; CHECK-NEXT: [[SUB:%.*]] = sub nuw nsw i32 32, [[CTLZ]]
170170
; CHECK-NEXT: [[SHL:%.*]] = shl nuw i32 1, [[SUB]]
171171
; CHECK-NEXT: [[UGT_INV:%.*]] = icmp ult i32 [[X]], 2
@@ -185,7 +185,7 @@ define i32 @bit_ceil_wrong_select_constant(i32 %x) {
185185
define i32 @bit_ceil_32_wrong_cond(i32 %x) {
186186
; CHECK-LABEL: @bit_ceil_32_wrong_cond(
187187
; CHECK-NEXT: [[DEC:%.*]] = add i32 [[X:%.*]], -1
188-
; CHECK-NEXT: [[CTLZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[DEC]], i1 false), !range [[RNG0]]
188+
; CHECK-NEXT: [[CTLZ:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[DEC]], i1 false)
189189
; CHECK-NEXT: [[SUB:%.*]] = sub nuw nsw i32 32, [[CTLZ]]
190190
; CHECK-NEXT: [[SHL:%.*]] = shl nuw i32 1, [[SUB]]
191191
; CHECK-NEXT: [[UGT:%.*]] = icmp ugt i32 [[X]], 2
@@ -205,7 +205,7 @@ define i32 @bit_ceil_32_wrong_cond(i32 %x) {
205205
define i32 @bit_ceil_wrong_sub_constant(i32 %x) {
206206
; CHECK-LABEL: @bit_ceil_wrong_sub_constant(
207207
; CHECK-NEXT: [[DEC:%.*]] = add i32 [[X:%.*]], -1
208-
; CHECK-NEXT: [[CTLZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[DEC]], i1 false), !range [[RNG0]]
208+
; CHECK-NEXT: [[CTLZ:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[DEC]], i1 false)
209209
; CHECK-NEXT: [[SUB:%.*]] = sub nuw nsw i32 33, [[CTLZ]]
210210
; CHECK-NEXT: [[SHL:%.*]] = shl nuw i32 1, [[SUB]]
211211
; CHECK-NEXT: [[UGT:%.*]] = icmp ugt i32 [[X]], 1
@@ -225,7 +225,7 @@ define i32 @bit_ceil_wrong_sub_constant(i32 %x) {
225225
define i32 @bit_ceil_32_shl_used_twice(i32 %x, ptr %p) {
226226
; CHECK-LABEL: @bit_ceil_32_shl_used_twice(
227227
; CHECK-NEXT: [[DEC:%.*]] = add i32 [[X:%.*]], -1
228-
; CHECK-NEXT: [[CTLZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[DEC]], i1 false), !range [[RNG0]]
228+
; CHECK-NEXT: [[CTLZ:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[DEC]], i1 false)
229229
; CHECK-NEXT: [[SUB:%.*]] = sub nuw nsw i32 32, [[CTLZ]]
230230
; CHECK-NEXT: [[SHL:%.*]] = shl nuw i32 1, [[SUB]]
231231
; CHECK-NEXT: [[UGT:%.*]] = icmp ugt i32 [[X]], 1
@@ -247,7 +247,7 @@ define i32 @bit_ceil_32_shl_used_twice(i32 %x, ptr %p) {
247247
define i32 @bit_ceil_32_sub_used_twice(i32 %x, ptr %p) {
248248
; CHECK-LABEL: @bit_ceil_32_sub_used_twice(
249249
; CHECK-NEXT: [[DEC:%.*]] = add i32 [[X:%.*]], -1
250-
; CHECK-NEXT: [[CTLZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[DEC]], i1 false), !range [[RNG0]]
250+
; CHECK-NEXT: [[CTLZ:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[DEC]], i1 false)
251251
; CHECK-NEXT: [[SUB:%.*]] = sub nuw nsw i32 32, [[CTLZ]]
252252
; CHECK-NEXT: [[SHL:%.*]] = shl nuw i32 1, [[SUB]]
253253
; CHECK-NEXT: [[UGT:%.*]] = icmp ugt i32 [[X]], 1
@@ -269,7 +269,7 @@ define i32 @bit_ceil_32_sub_used_twice(i32 %x, ptr %p) {
269269
define <4 x i32> @bit_ceil_v4i32(<4 x i32> %x) {
270270
; CHECK-LABEL: @bit_ceil_v4i32(
271271
; CHECK-NEXT: [[DEC:%.*]] = add <4 x i32> [[X:%.*]], <i32 -1, i32 -1, i32 -1, i32 -1>
272-
; CHECK-NEXT: [[CTLZ:%.*]] = tail call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> [[DEC]], i1 false), !range [[RNG0]]
272+
; CHECK-NEXT: [[CTLZ:%.*]] = tail call range(i32 0, 33) <4 x i32> @llvm.ctlz.v4i32(<4 x i32> [[DEC]], i1 false)
273273
; CHECK-NEXT: [[TMP1:%.*]] = sub nsw <4 x i32> zeroinitializer, [[CTLZ]]
274274
; CHECK-NEXT: [[TMP2:%.*]] = and <4 x i32> [[TMP1]], <i32 31, i32 31, i32 31, i32 31>
275275
; CHECK-NEXT: [[SEL:%.*]] = shl nuw <4 x i32> <i32 1, i32 1, i32 1, i32 1>, [[TMP2]]

‎llvm/test/Transforms/InstCombine/bit_floor.ll

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -5,7 +5,7 @@ define i32 @bit_floor_32(i32 %x) {
55
; CHECK-LABEL: @bit_floor_32(
66
; CHECK-NEXT: [[EQ0:%.*]] = icmp eq i32 [[X:%.*]], 0
77
; CHECK-NEXT: [[LSHR:%.*]] = lshr i32 [[X]], 1
8-
; CHECK-NEXT: [[CTLZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[LSHR]], i1 false), !range [[RNG0:![0-9]+]]
8+
; CHECK-NEXT: [[CTLZ:%.*]] = tail call range(i32 1, 33) i32 @llvm.ctlz.i32(i32 [[LSHR]], i1 false)
99
; CHECK-NEXT: [[SUB:%.*]] = sub nuw nsw i32 32, [[CTLZ]]
1010
; CHECK-NEXT: [[SHL:%.*]] = shl nuw i32 1, [[SUB]]
1111
; CHECK-NEXT: [[SEL:%.*]] = select i1 [[EQ0]], i32 0, i32 [[SHL]]
@@ -24,7 +24,7 @@ define i64 @bit_floor_64(i64 %x) {
2424
; CHECK-LABEL: @bit_floor_64(
2525
; CHECK-NEXT: [[EQ0:%.*]] = icmp eq i64 [[X:%.*]], 0
2626
; CHECK-NEXT: [[LSHR:%.*]] = lshr i64 [[X]], 1
27-
; CHECK-NEXT: [[CTLZ:%.*]] = tail call i64 @llvm.ctlz.i64(i64 [[LSHR]], i1 false), !range [[RNG1:![0-9]+]]
27+
; CHECK-NEXT: [[CTLZ:%.*]] = tail call range(i64 1, 65) i64 @llvm.ctlz.i64(i64 [[LSHR]], i1 false)
2828
; CHECK-NEXT: [[SUB:%.*]] = sub nuw nsw i64 64, [[CTLZ]]
2929
; CHECK-NEXT: [[SHL:%.*]] = shl nuw i64 1, [[SUB]]
3030
; CHECK-NEXT: [[SEL:%.*]] = select i1 [[EQ0]], i64 0, i64 [[SHL]]
@@ -44,7 +44,7 @@ define i32 @bit_floor_commuted_operands(i32 %x) {
4444
; CHECK-LABEL: @bit_floor_commuted_operands(
4545
; CHECK-NEXT: [[NE0_NOT:%.*]] = icmp eq i32 [[X:%.*]], 0
4646
; CHECK-NEXT: [[LSHR:%.*]] = lshr i32 [[X]], 1
47-
; CHECK-NEXT: [[CTLZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[LSHR]], i1 false), !range [[RNG0]]
47+
; CHECK-NEXT: [[CTLZ:%.*]] = tail call range(i32 1, 33) i32 @llvm.ctlz.i32(i32 [[LSHR]], i1 false)
4848
; CHECK-NEXT: [[SUB:%.*]] = sub nuw nsw i32 32, [[CTLZ]]
4949
; CHECK-NEXT: [[SHL:%.*]] = shl nuw i32 1, [[SUB]]
5050
; CHECK-NEXT: [[SEL:%.*]] = select i1 [[NE0_NOT]], i32 0, i32 [[SHL]]
@@ -64,7 +64,7 @@ define i32 @bit_floor_lshr_used_twice(i32 %x, ptr %p) {
6464
; CHECK-LABEL: @bit_floor_lshr_used_twice(
6565
; CHECK-NEXT: [[EQ0:%.*]] = icmp eq i32 [[X:%.*]], 0
6666
; CHECK-NEXT: [[LSHR:%.*]] = lshr i32 [[X]], 1
67-
; CHECK-NEXT: [[CTLZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[LSHR]], i1 false), !range [[RNG0]]
67+
; CHECK-NEXT: [[CTLZ:%.*]] = tail call range(i32 1, 33) i32 @llvm.ctlz.i32(i32 [[LSHR]], i1 false)
6868
; CHECK-NEXT: [[SUB:%.*]] = sub nuw nsw i32 32, [[CTLZ]]
6969
; CHECK-NEXT: [[SHL:%.*]] = shl nuw i32 1, [[SUB]]
7070
; CHECK-NEXT: [[SEL:%.*]] = select i1 [[EQ0]], i32 0, i32 [[SHL]]
@@ -86,7 +86,7 @@ define i32 @bit_floor_ctlz_used_twice(i32 %x, ptr %p) {
8686
; CHECK-LABEL: @bit_floor_ctlz_used_twice(
8787
; CHECK-NEXT: [[EQ0:%.*]] = icmp eq i32 [[X:%.*]], 0
8888
; CHECK-NEXT: [[LSHR:%.*]] = lshr i32 [[X]], 1
89-
; CHECK-NEXT: [[CTLZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[LSHR]], i1 false), !range [[RNG0]]
89+
; CHECK-NEXT: [[CTLZ:%.*]] = tail call range(i32 1, 33) i32 @llvm.ctlz.i32(i32 [[LSHR]], i1 false)
9090
; CHECK-NEXT: [[SUB:%.*]] = sub nuw nsw i32 32, [[CTLZ]]
9191
; CHECK-NEXT: [[SHL:%.*]] = shl nuw i32 1, [[SUB]]
9292
; CHECK-NEXT: [[SEL:%.*]] = select i1 [[EQ0]], i32 0, i32 [[SHL]]
@@ -108,7 +108,7 @@ define i32 @bit_floor_sub_used_twice(i32 %x, ptr %p) {
108108
; CHECK-LABEL: @bit_floor_sub_used_twice(
109109
; CHECK-NEXT: [[EQ0:%.*]] = icmp eq i32 [[X:%.*]], 0
110110
; CHECK-NEXT: [[LSHR:%.*]] = lshr i32 [[X]], 1
111-
; CHECK-NEXT: [[CTLZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[LSHR]], i1 false), !range [[RNG0]]
111+
; CHECK-NEXT: [[CTLZ:%.*]] = tail call range(i32 1, 33) i32 @llvm.ctlz.i32(i32 [[LSHR]], i1 false)
112112
; CHECK-NEXT: [[SUB:%.*]] = sub nuw nsw i32 32, [[CTLZ]]
113113
; CHECK-NEXT: [[SHL:%.*]] = shl nuw i32 1, [[SUB]]
114114
; CHECK-NEXT: [[SEL:%.*]] = select i1 [[EQ0]], i32 0, i32 [[SHL]]
@@ -130,7 +130,7 @@ define i32 @bit_floor_shl_used_twice(i32 %x, ptr %p) {
130130
; CHECK-LABEL: @bit_floor_shl_used_twice(
131131
; CHECK-NEXT: [[EQ0:%.*]] = icmp eq i32 [[X:%.*]], 0
132132
; CHECK-NEXT: [[LSHR:%.*]] = lshr i32 [[X]], 1
133-
; CHECK-NEXT: [[CTLZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[LSHR]], i1 false), !range [[RNG0]]
133+
; CHECK-NEXT: [[CTLZ:%.*]] = tail call range(i32 1, 33) i32 @llvm.ctlz.i32(i32 [[LSHR]], i1 false)
134134
; CHECK-NEXT: [[SUB:%.*]] = sub nuw nsw i32 32, [[CTLZ]]
135135
; CHECK-NEXT: [[SHL:%.*]] = shl nuw i32 1, [[SUB]]
136136
; CHECK-NEXT: [[SEL:%.*]] = select i1 [[EQ0]], i32 0, i32 [[SHL]]
@@ -152,7 +152,7 @@ define <4 x i32> @bit_floor_v4i32(<4 x i32> %x) {
152152
; CHECK-LABEL: @bit_floor_v4i32(
153153
; CHECK-NEXT: [[EQ0:%.*]] = icmp eq <4 x i32> [[X:%.*]], zeroinitializer
154154
; CHECK-NEXT: [[LSHR:%.*]] = lshr <4 x i32> [[X]], <i32 1, i32 1, i32 1, i32 1>
155-
; CHECK-NEXT: [[CTLZ:%.*]] = tail call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> [[LSHR]], i1 false), !range [[RNG0]]
155+
; CHECK-NEXT: [[CTLZ:%.*]] = tail call range(i32 1, 33) <4 x i32> @llvm.ctlz.v4i32(<4 x i32> [[LSHR]], i1 false)
156156
; CHECK-NEXT: [[SUB:%.*]] = sub nuw nsw <4 x i32> <i32 32, i32 32, i32 32, i32 32>, [[CTLZ]]
157157
; CHECK-NEXT: [[SHL:%.*]] = shl nuw <4 x i32> <i32 1, i32 1, i32 1, i32 1>, [[SUB]]
158158
; CHECK-NEXT: [[SEL:%.*]] = select <4 x i1> [[EQ0]], <4 x i32> zeroinitializer, <4 x i32> [[SHL]]

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