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[ConstraintElimination] Add eq/ne facts to signed constraint system
Facts of eq/ne were added to unsigned system only, causing some missing optimizations. This patch adds eq/ne facts to both signed & unsigned constraint system. Fixes #117961.
1 parent 62cd050 commit bd4a323

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4 files changed

+56
-13
lines changed

4 files changed

+56
-13
lines changed

llvm/lib/Transforms/Scalar/ConstraintElimination.cpp

Lines changed: 31 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -313,7 +313,8 @@ class ConstraintInfo {
313313
/// New variables that need to be added to the system are collected in
314314
/// \p NewVariables.
315315
ConstraintTy getConstraint(CmpInst::Predicate Pred, Value *Op0, Value *Op1,
316-
SmallVectorImpl<Value *> &NewVariables) const;
316+
SmallVectorImpl<Value *> &NewVariables,
317+
bool ForceSignedSystem = false) const;
317318

318319
/// Turns a comparison of the form \p Op0 \p Pred \p Op1 into a vector of
319320
/// constraints using getConstraint. Returns an empty constraint if the result
@@ -330,6 +331,14 @@ class ConstraintInfo {
330331
void transferToOtherSystem(CmpInst::Predicate Pred, Value *A, Value *B,
331332
unsigned NumIn, unsigned NumOut,
332333
SmallVectorImpl<StackEntry> &DFSInStack);
334+
335+
private:
336+
/// Adds facts into constraint system. \p ForceSignedSystem can be set when
337+
/// the \p Pred is eq/ne, and signed constraint system is used when it's
338+
/// specified.
339+
void addFactImpl(CmpInst::Predicate Pred, Value *A, Value *B, unsigned NumIn,
340+
unsigned NumOut, SmallVectorImpl<StackEntry> &DFSInStack,
341+
bool ForceSignedSystem);
333342
};
334343

335344
/// Represents a (Coefficient * Variable) entry after IR decomposition.
@@ -636,8 +645,13 @@ static Decomposition decompose(Value *V,
636645

637646
ConstraintTy
638647
ConstraintInfo::getConstraint(CmpInst::Predicate Pred, Value *Op0, Value *Op1,
639-
SmallVectorImpl<Value *> &NewVariables) const {
648+
SmallVectorImpl<Value *> &NewVariables,
649+
bool ForceSignedSystem) const {
640650
assert(NewVariables.empty() && "NewVariables must be empty when passed in");
651+
assert((!ForceSignedSystem || Pred == CmpInst::ICMP_EQ ||
652+
Pred == CmpInst::ICMP_NE) &&
653+
"signed system can only be forced on eq/ne");
654+
641655
bool IsEq = false;
642656
bool IsNe = false;
643657

@@ -652,15 +666,15 @@ ConstraintInfo::getConstraint(CmpInst::Predicate Pred, Value *Op0, Value *Op1,
652666
break;
653667
}
654668
case CmpInst::ICMP_EQ:
655-
if (match(Op1, m_Zero())) {
669+
if (!ForceSignedSystem && match(Op1, m_Zero())) {
656670
Pred = CmpInst::ICMP_ULE;
657671
} else {
658672
IsEq = true;
659673
Pred = CmpInst::ICMP_ULE;
660674
}
661675
break;
662676
case CmpInst::ICMP_NE:
663-
if (match(Op1, m_Zero())) {
677+
if (!ForceSignedSystem && match(Op1, m_Zero())) {
664678
Pred = CmpInst::getSwappedPredicate(CmpInst::ICMP_UGT);
665679
std::swap(Op0, Op1);
666680
} else {
@@ -677,7 +691,7 @@ ConstraintInfo::getConstraint(CmpInst::Predicate Pred, Value *Op0, Value *Op1,
677691
return {};
678692

679693
SmallVector<ConditionTy, 4> Preconditions;
680-
bool IsSigned = CmpInst::isSigned(Pred);
694+
bool IsSigned = ForceSignedSystem || CmpInst::isSigned(Pred);
681695
auto &Value2Index = getValue2Index(IsSigned);
682696
auto ADec = decompose(Op0->stripPointerCastsSameRepresentation(),
683697
Preconditions, IsSigned, DL);
@@ -737,7 +751,7 @@ ConstraintInfo::getConstraint(CmpInst::Predicate Pred, Value *Op0, Value *Op1,
737751
int64_t OffsetSum;
738752
if (AddOverflow(Offset1, Offset2, OffsetSum))
739753
return {};
740-
if (Pred == (IsSigned ? CmpInst::ICMP_SLT : CmpInst::ICMP_ULT))
754+
if (Pred == CmpInst::ICMP_SLT || Pred == CmpInst::ICMP_ULT)
741755
if (AddOverflow(OffsetSum, int64_t(-1), OffsetSum))
742756
return {};
743757
R[0] = OffsetSum;
@@ -1580,10 +1594,20 @@ static bool checkOrAndOpImpliedByOther(
15801594
void ConstraintInfo::addFact(CmpInst::Predicate Pred, Value *A, Value *B,
15811595
unsigned NumIn, unsigned NumOut,
15821596
SmallVectorImpl<StackEntry> &DFSInStack) {
1597+
addFactImpl(Pred, A, B, NumIn, NumOut, DFSInStack, false);
1598+
// If the Pred is eq/ne, also add the fact to signed system.
1599+
if (Pred == ICmpInst::ICMP_EQ || Pred == ICmpInst::ICMP_NE)
1600+
addFactImpl(Pred, A, B, NumIn, NumOut, DFSInStack, true);
1601+
}
1602+
1603+
void ConstraintInfo::addFactImpl(CmpInst::Predicate Pred, Value *A, Value *B,
1604+
unsigned NumIn, unsigned NumOut,
1605+
SmallVectorImpl<StackEntry> &DFSInStack,
1606+
bool ForceSignedSystem) {
15831607
// If the constraint has a pre-condition, skip the constraint if it does not
15841608
// hold.
15851609
SmallVector<Value *> NewVariables;
1586-
auto R = getConstraint(Pred, A, B, NewVariables);
1610+
auto R = getConstraint(Pred, A, B, NewVariables, ForceSignedSystem);
15871611

15881612
// TODO: Support non-equality for facts as well.
15891613
if (!R.isValid(*this) || R.isNe())

llvm/test/Transforms/ConstraintElimination/ne.ll

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -71,8 +71,7 @@ define i1 @test_ne_eq_0(i8 %a, i8 %b) {
7171
; CHECK-NEXT: [[RES_13:%.*]] = xor i1 [[RES_12]], false
7272
; CHECK-NEXT: [[RES_14:%.*]] = xor i1 [[RES_13]], false
7373
; CHECK-NEXT: [[RES_15:%.*]] = xor i1 [[RES_14]], false
74-
; CHECK-NEXT: [[C_12:%.*]] = icmp sgt i8 [[A]], 0
75-
; CHECK-NEXT: [[RES_16:%.*]] = xor i1 [[RES_15]], [[C_12]]
74+
; CHECK-NEXT: [[RES_16:%.*]] = xor i1 [[RES_15]], false
7675
; CHECK-NEXT: ret i1 [[RES_16]]
7776
;
7877
entry:
@@ -209,8 +208,7 @@ define i1 @test_ne_eq_1(i8 %a, i8 %b) {
209208
; CHECK-NEXT: [[RES_13:%.*]] = xor i1 [[RES_12]], true
210209
; CHECK-NEXT: [[RES_14:%.*]] = xor i1 [[RES_13]], true
211210
; CHECK-NEXT: [[RES_15:%.*]] = xor i1 [[RES_14]], false
212-
; CHECK-NEXT: [[C_12:%.*]] = icmp sgt i8 [[A]], 0
213-
; CHECK-NEXT: [[RES_16:%.*]] = xor i1 [[RES_15]], [[C_12]]
211+
; CHECK-NEXT: [[RES_16:%.*]] = xor i1 [[RES_15]], true
214212
; CHECK-NEXT: ret i1 [[RES_16]]
215213
;
216214
entry:

llvm/test/Transforms/ConstraintElimination/pr105785.ll

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -15,8 +15,7 @@ define void @pr105785(ptr %p) {
1515
; CHECK-NEXT: [[CMP2:%.*]] = icmp ult i32 [[FOR_IND2]], 3
1616
; CHECK-NEXT: br i1 [[CMP2]], label %[[FOR_BODY3]], label %[[FOR_COND]]
1717
; CHECK: [[FOR_BODY3]]:
18-
; CHECK-NEXT: [[SCMP:%.*]] = call i32 @llvm.scmp.i32.i32(i32 [[FOR_IND]], i32 1)
19-
; CHECK-NEXT: store i32 [[SCMP]], ptr [[P]], align 4
18+
; CHECK-NEXT: store i32 -1, ptr [[P]], align 4
2019
; CHECK-NEXT: [[INC]] = add nuw nsw i32 [[FOR_IND2]], 1
2120
; CHECK-NEXT: br label %[[FOR_COND1]]
2221
; CHECK: [[FOR_END6]]:
Lines changed: 22 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,22 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
2+
; RUN: opt -passes=constraint-elimination -S %s | FileCheck %s
3+
4+
define i1 @f(i32 noundef %v0, i32 noundef %v1, i32 noundef %v2) {
5+
; CHECK-LABEL: define i1 @f(
6+
; CHECK-SAME: i32 noundef [[V0:%.*]], i32 noundef [[V1:%.*]], i32 noundef [[V2:%.*]]) {
7+
; CHECK-NEXT: [[ENTRY:.*:]]
8+
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[V2]], [[V0]]
9+
; CHECK-NEXT: [[CMP1:%.*]] = icmp sge i32 [[V0]], [[V1]]
10+
; CHECK-NEXT: [[AND0:%.*]] = and i1 [[CMP1]], [[CMP]]
11+
; CHECK-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[V1]], [[V2]]
12+
; CHECK-NEXT: [[AND1:%.*]] = and i1 false, [[AND0]]
13+
; CHECK-NEXT: ret i1 [[AND1]]
14+
;
15+
entry:
16+
%cmp = icmp eq i32 %v2, %v0
17+
%cmp1 = icmp sge i32 %v0, %v1
18+
%and0 = and i1 %cmp1, %cmp
19+
%cmp4 = icmp sgt i32 %v1, %v2
20+
%and1 = and i1 %cmp4, %and0
21+
ret i1 %and1
22+
}

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