Skip to content

Commit bde2432

Browse files
jmorsejmorse
committed
Revert "[Asan] Provide TTI hook to provide memory reference infromation of target intrinsics. (#97070)"
This reverts commit e8ad87c. This reverts commit d3c9bb0. A few buildbots trip up on asan-rvv-intrinsics.ll. I've also reverted the follow-up commit d3c9bb0. https://lab.llvm.org/buildbot/#/builders/46/builds/2895
1 parent 5313d2e commit bde2432

File tree

12 files changed

+59
-2465
lines changed

12 files changed

+59
-2465
lines changed

‎llvm/include/llvm/Analysis/MemoryRefInfo.h

Lines changed: 0 additions & 53 deletions
This file was deleted.

‎llvm/include/llvm/Analysis/TargetTransformInfo.h

Lines changed: 0 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -23,7 +23,6 @@
2323

2424
#include "llvm/ADT/APInt.h"
2525
#include "llvm/ADT/SmallBitVector.h"
26-
#include "llvm/Analysis/MemoryRefInfo.h"
2726
#include "llvm/IR/FMF.h"
2827
#include "llvm/IR/InstrTypes.h"
2928
#include "llvm/IR/PassManager.h"
@@ -962,10 +961,6 @@ class TargetTransformInfo {
962961
MemCmpExpansionOptions enableMemCmpExpansion(bool OptSize,
963962
bool IsZeroCmp) const;
964963

965-
// Add MemoryRefInfo of Intrinsic \p II into array \p Interesting.
966-
bool getMemoryRefInfo(SmallVectorImpl<MemoryRefInfo> &Interesting,
967-
IntrinsicInst *II) const;
968-
969964
/// Should the Select Optimization pass be enabled and ran.
970965
bool enableSelectOptimize() const;
971966

@@ -1956,8 +1951,6 @@ class TargetTransformInfo::Concept {
19561951
virtual bool enableAggressiveInterleaving(bool LoopHasReductions) = 0;
19571952
virtual MemCmpExpansionOptions
19581953
enableMemCmpExpansion(bool OptSize, bool IsZeroCmp) const = 0;
1959-
virtual bool getMemoryRefInfo(SmallVectorImpl<MemoryRefInfo> &Interesting,
1960-
IntrinsicInst *II) const = 0;
19611954
virtual bool enableSelectOptimize() = 0;
19621955
virtual bool shouldTreatInstructionLikeSelect(const Instruction *I) = 0;
19631956
virtual bool enableInterleavedAccessVectorization() = 0;
@@ -2517,12 +2510,6 @@ class TargetTransformInfo::Model final : public TargetTransformInfo::Concept {
25172510
bool IsZeroCmp) const override {
25182511
return Impl.enableMemCmpExpansion(OptSize, IsZeroCmp);
25192512
}
2520-
2521-
bool getMemoryRefInfo(SmallVectorImpl<MemoryRefInfo> &Interesting,
2522-
IntrinsicInst *II) const override {
2523-
return Impl.getMemoryRefInfo(Interesting, II);
2524-
}
2525-
25262513
bool enableSelectOptimize() override {
25272514
return Impl.enableSelectOptimize();
25282515
}

‎llvm/include/llvm/Analysis/TargetTransformInfoImpl.h

Lines changed: 0 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -396,11 +396,6 @@ class TargetTransformInfoImplBase {
396396
return {};
397397
}
398398

399-
bool getMemoryRefInfo(SmallVectorImpl<MemoryRefInfo> &Interesting,
400-
IntrinsicInst *II) const {
401-
return false;
402-
}
403-
404399
bool enableSelectOptimize() const { return true; }
405400

406401
bool shouldTreatInstructionLikeSelect(const Instruction *I) {

‎llvm/include/llvm/Transforms/Instrumentation/AddressSanitizerCommon.h

Lines changed: 31 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -14,7 +14,6 @@
1414
#define LLVM_TRANSFORMS_INSTRUMENTATION_ADDRESSSANITIZERCOMMON_H
1515

1616
#include "llvm/Analysis/CFG.h"
17-
#include "llvm/Analysis/MemoryRefInfo.h"
1817
#include "llvm/Analysis/PostDominators.h"
1918
#include "llvm/IR/Dominators.h"
2019
#include "llvm/IR/Instruction.h"
@@ -23,6 +22,37 @@
2322

2423
namespace llvm {
2524

25+
class InterestingMemoryOperand {
26+
public:
27+
Use *PtrUse;
28+
bool IsWrite;
29+
Type *OpType;
30+
TypeSize TypeStoreSize = TypeSize::getFixed(0);
31+
MaybeAlign Alignment;
32+
// The mask Value, if we're looking at a masked load/store.
33+
Value *MaybeMask;
34+
// The EVL Value, if we're looking at a vp intrinsic.
35+
Value *MaybeEVL;
36+
// The Stride Value, if we're looking at a strided load/store.
37+
Value *MaybeStride;
38+
39+
InterestingMemoryOperand(Instruction *I, unsigned OperandNo, bool IsWrite,
40+
class Type *OpType, MaybeAlign Alignment,
41+
Value *MaybeMask = nullptr,
42+
Value *MaybeEVL = nullptr,
43+
Value *MaybeStride = nullptr)
44+
: IsWrite(IsWrite), OpType(OpType), Alignment(Alignment),
45+
MaybeMask(MaybeMask), MaybeEVL(MaybeEVL), MaybeStride(MaybeStride) {
46+
const DataLayout &DL = I->getDataLayout();
47+
TypeStoreSize = DL.getTypeStoreSizeInBits(OpType);
48+
PtrUse = &I->getOperandUse(OperandNo);
49+
}
50+
51+
Instruction *getInsn() { return cast<Instruction>(PtrUse->getUser()); }
52+
53+
Value *getPtr() { return PtrUse->get(); }
54+
};
55+
2656
// Get AddressSanitizer parameters.
2757
void getAddressSanitizerParams(const Triple &TargetTriple, int LongSize,
2858
bool IsKasan, uint64_t *ShadowBase,

‎llvm/lib/Analysis/TargetTransformInfo.cpp

Lines changed: 0 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -626,11 +626,6 @@ TargetTransformInfo::enableMemCmpExpansion(bool OptSize, bool IsZeroCmp) const {
626626
return TTIImpl->enableMemCmpExpansion(OptSize, IsZeroCmp);
627627
}
628628

629-
bool TargetTransformInfo::getMemoryRefInfo(
630-
SmallVectorImpl<MemoryRefInfo> &Interesting, IntrinsicInst *II) const {
631-
return TTIImpl->getMemoryRefInfo(Interesting, II);
632-
}
633-
634629
bool TargetTransformInfo::enableSelectOptimize() const {
635630
return TTIImpl->enableSelectOptimize();
636631
}

‎llvm/lib/Target/AMDGPU/AMDGPUAsanInstrumentation.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -181,7 +181,7 @@ void instrumentAddress(Module &M, IRBuilder<> &IRB, Instruction *OrigIns,
181181

182182
void getInterestingMemoryOperands(
183183
Module &M, Instruction *I,
184-
SmallVectorImpl<MemoryRefInfo> &Interesting) {
184+
SmallVectorImpl<InterestingMemoryOperand> &Interesting) {
185185
const DataLayout &DL = M.getDataLayout();
186186
if (LoadInst *LI = dyn_cast<LoadInst>(I)) {
187187
Interesting.emplace_back(I, LI->getPointerOperandIndex(), false,

‎llvm/lib/Target/AMDGPU/AMDGPUAsanInstrumentation.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -52,7 +52,7 @@ void instrumentAddress(Module &M, IRBuilder<> &IRB, Instruction *OrigIns,
5252
/// that needs to be instrumented
5353
void getInterestingMemoryOperands(
5454
Module &M, Instruction *I,
55-
SmallVectorImpl<MemoryRefInfo> &Interesting);
55+
SmallVectorImpl<InterestingMemoryOperand> &Interesting);
5656

5757
} // end namespace AMDGPU
5858
} // end namespace llvm

‎llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp

Lines changed: 0 additions & 78 deletions
Original file line numberDiff line numberDiff line change
@@ -14,7 +14,6 @@
1414
#include "llvm/CodeGen/CostTable.h"
1515
#include "llvm/CodeGen/TargetLowering.h"
1616
#include "llvm/IR/Instructions.h"
17-
#include "llvm/IR/IntrinsicsRISCV.h"
1817
#include "llvm/IR/PatternMatch.h"
1918
#include <cmath>
2019
#include <optional>
@@ -37,83 +36,6 @@ static cl::opt<unsigned> SLPMaxVF(
3736
"exclusively by SLP vectorizer."),
3837
cl::Hidden);
3938

40-
bool RISCVTTIImpl::getMemoryRefInfo(SmallVectorImpl<MemoryRefInfo> &Interesting,
41-
IntrinsicInst *II) const {
42-
const DataLayout &DL = getDataLayout();
43-
Intrinsic::ID IID = II->getIntrinsicID();
44-
LLVMContext &C = II->getContext();
45-
bool HasMask = false;
46-
47-
switch (IID) {
48-
case Intrinsic::riscv_vle_mask:
49-
case Intrinsic::riscv_vse_mask:
50-
HasMask = true;
51-
[[fallthrough]];
52-
case Intrinsic::riscv_vle:
53-
case Intrinsic::riscv_vse: {
54-
// Intrinsic interface:
55-
// riscv_vle(merge, ptr, vl)
56-
// riscv_vle_mask(merge, ptr, mask, vl, policy)
57-
// riscv_vse(val, ptr, vl)
58-
// riscv_vse_mask(val, ptr, mask, vl, policy)
59-
bool IsWrite = II->getType()->isVoidTy();
60-
Type *Ty = IsWrite ? II->getArgOperand(0)->getType() : II->getType();
61-
const auto *RVVIInfo = RISCVVIntrinsicsTable::getRISCVVIntrinsicInfo(IID);
62-
unsigned VLIndex = RVVIInfo->VLOperand;
63-
unsigned PtrOperandNo = VLIndex - 1 - HasMask;
64-
MaybeAlign Alignment =
65-
II->getArgOperand(PtrOperandNo)->getPointerAlignment(DL);
66-
Type *MaskType = Ty->getWithNewType(Type::getInt1Ty(C));
67-
Value *Mask = ConstantInt::getTrue(MaskType);
68-
if (HasMask)
69-
Mask = II->getArgOperand(VLIndex - 1);
70-
Value *EVL = II->getArgOperand(VLIndex);
71-
Interesting.emplace_back(II, PtrOperandNo, IsWrite, Ty, Alignment, Mask,
72-
EVL);
73-
return true;
74-
}
75-
case Intrinsic::riscv_vlse_mask:
76-
case Intrinsic::riscv_vsse_mask:
77-
HasMask = true;
78-
[[fallthrough]];
79-
case Intrinsic::riscv_vlse:
80-
case Intrinsic::riscv_vsse: {
81-
// Intrinsic interface:
82-
// riscv_vlse(merge, ptr, stride, vl)
83-
// riscv_vlse_mask(merge, ptr, stride, mask, vl, policy)
84-
// riscv_vsse(val, ptr, stride, vl)
85-
// riscv_vsse_mask(val, ptr, stride, mask, vl, policy)
86-
bool IsWrite = II->getType()->isVoidTy();
87-
Type *Ty = IsWrite ? II->getArgOperand(0)->getType() : II->getType();
88-
const auto *RVVIInfo = RISCVVIntrinsicsTable::getRISCVVIntrinsicInfo(IID);
89-
unsigned VLIndex = RVVIInfo->VLOperand;
90-
unsigned PtrOperandNo = VLIndex - 2 - HasMask;
91-
MaybeAlign Alignment =
92-
II->getArgOperand(PtrOperandNo)->getPointerAlignment(DL);
93-
94-
Value *Stride = II->getArgOperand(PtrOperandNo + 1);
95-
// Use the pointer alignment as the element alignment if the stride is a
96-
// multiple of the pointer alignment. Otherwise, the element alignment
97-
// should be the greatest common divisor of pointer alignment and stride.
98-
// For simplicity, just consider unalignment for elements.
99-
unsigned PointerAlign = Alignment.valueOrOne().value();
100-
if (!isa<ConstantInt>(Stride) ||
101-
cast<ConstantInt>(Stride)->getZExtValue() % PointerAlign != 0)
102-
Alignment = Align(1);
103-
104-
Type *MaskType = Ty->getWithNewType(Type::getInt1Ty(C));
105-
Value *Mask = ConstantInt::getTrue(MaskType);
106-
if (HasMask)
107-
Mask = II->getArgOperand(VLIndex - 1);
108-
Value *EVL = II->getArgOperand(VLIndex);
109-
Interesting.emplace_back(II, PtrOperandNo, IsWrite, Ty, Alignment, Mask,
110-
EVL, Stride);
111-
return true;
112-
}
113-
}
114-
return false;
115-
}
116-
11739
InstructionCost
11840
RISCVTTIImpl::getRISCVInstructionCost(ArrayRef<unsigned> OpCodes, MVT VT,
11941
TTI::TargetCostKind CostKind) {

‎llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -60,9 +60,6 @@ class RISCVTTIImpl : public BasicTTIImplBase<RISCVTTIImpl> {
6060
: BaseT(TM, F.getDataLayout()), ST(TM->getSubtargetImpl(F)),
6161
TLI(ST->getTargetLowering()) {}
6262

63-
bool getMemoryRefInfo(SmallVectorImpl<MemoryRefInfo> &Interesting,
64-
IntrinsicInst *II) const;
65-
6663
bool areInlineCompatible(const Function *Caller,
6764
const Function *Callee) const;
6865

‎llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp

Lines changed: 14 additions & 23 deletions
Original file line numberDiff line numberDiff line change
@@ -29,7 +29,6 @@
2929
#include "llvm/Analysis/MemoryBuiltins.h"
3030
#include "llvm/Analysis/StackSafetyAnalysis.h"
3131
#include "llvm/Analysis/TargetLibraryInfo.h"
32-
#include "llvm/Analysis/TargetTransformInfo.h"
3332
#include "llvm/Analysis/ValueTracking.h"
3433
#include "llvm/BinaryFormat/MachO.h"
3534
#include "llvm/Demangle/Demangle.h"
@@ -755,13 +754,12 @@ struct AddressSanitizer {
755754
bool isInterestingAlloca(const AllocaInst &AI);
756755

757756
bool ignoreAccess(Instruction *Inst, Value *Ptr);
758-
void getMemoryRefInfos(Instruction *I,
759-
SmallVectorImpl<MemoryRefInfo> &Interesting,
760-
const TargetTransformInfo *TTI);
757+
void getInterestingMemoryOperands(
758+
Instruction *I, SmallVectorImpl<InterestingMemoryOperand> &Interesting);
761759

762-
void instrumentMop(ObjectSizeOffsetVisitor &ObjSizeVis, MemoryRefInfo &O,
763-
bool UseCalls, const DataLayout &DL,
764-
RuntimeCallInserter &RTCI);
760+
void instrumentMop(ObjectSizeOffsetVisitor &ObjSizeVis,
761+
InterestingMemoryOperand &O, bool UseCalls,
762+
const DataLayout &DL, RuntimeCallInserter &RTCI);
765763
void instrumentPointerComparisonOrSubtraction(Instruction *I,
766764
RuntimeCallInserter &RTCI);
767765
void instrumentAddress(Instruction *OrigIns, Instruction *InsertBefore,
@@ -797,8 +795,7 @@ struct AddressSanitizer {
797795
void instrumentMemIntrinsic(MemIntrinsic *MI, RuntimeCallInserter &RTCI);
798796
Value *memToShadow(Value *Shadow, IRBuilder<> &IRB);
799797
bool suppressInstrumentationSiteForDebug(int &Instrumented);
800-
bool instrumentFunction(Function &F, const TargetLibraryInfo *TLI,
801-
const TargetTransformInfo *TTI);
798+
bool instrumentFunction(Function &F, const TargetLibraryInfo *TLI);
802799
bool maybeInsertAsanInitAtFunctionEntry(Function &F);
803800
bool maybeInsertDynamicShadowAtFunctionEntry(Function &F);
804801
void markEscapedLocalAllocas(Function &F);
@@ -1267,8 +1264,7 @@ PreservedAnalyses AddressSanitizerPass::run(Module &M,
12671264
Options.MaxInlinePoisoningSize, Options.CompileKernel, Options.Recover,
12681265
Options.UseAfterScope, Options.UseAfterReturn);
12691266
const TargetLibraryInfo &TLI = FAM.getResult<TargetLibraryAnalysis>(F);
1270-
const TargetTransformInfo &TTI = FAM.getResult<TargetIRAnalysis>(F);
1271-
Modified |= FunctionSanitizer.instrumentFunction(F, &TLI, &TTI);
1267+
Modified |= FunctionSanitizer.instrumentFunction(F, &TLI);
12721268
}
12731269
Modified |= ModuleSanitizer.instrumentModule(M);
12741270
if (!Modified)
@@ -1405,9 +1401,8 @@ bool AddressSanitizer::ignoreAccess(Instruction *Inst, Value *Ptr) {
14051401
return false;
14061402
}
14071403

1408-
void AddressSanitizer::getMemoryRefInfos(
1409-
Instruction *I, SmallVectorImpl<MemoryRefInfo> &Interesting,
1410-
const TargetTransformInfo *TTI) {
1404+
void AddressSanitizer::getInterestingMemoryOperands(
1405+
Instruction *I, SmallVectorImpl<InterestingMemoryOperand> &Interesting) {
14111406
// Do not instrument the load fetching the dynamic shadow address.
14121407
if (LocalDynamicShadow == I)
14131408
return;
@@ -1525,9 +1520,6 @@ void AddressSanitizer::getMemoryRefInfos(
15251520
break;
15261521
}
15271522
default:
1528-
if (auto *II = dyn_cast<IntrinsicInst>(I))
1529-
if (TTI->getMemoryRefInfo(Interesting, II))
1530-
return;
15311523
for (unsigned ArgNo = 0; ArgNo < CI->arg_size(); ArgNo++) {
15321524
if (!ClInstrumentByval || !CI->isByValArgument(ArgNo) ||
15331525
ignoreAccess(I, CI->getArgOperand(ArgNo)))
@@ -1690,7 +1682,7 @@ void AddressSanitizer::instrumentMaskedLoadOrStore(
16901682
}
16911683

16921684
void AddressSanitizer::instrumentMop(ObjectSizeOffsetVisitor &ObjSizeVis,
1693-
MemoryRefInfo &O, bool UseCalls,
1685+
InterestingMemoryOperand &O, bool UseCalls,
16941686
const DataLayout &DL,
16951687
RuntimeCallInserter &RTCI) {
16961688
Value *Addr = O.getPtr();
@@ -2948,8 +2940,7 @@ bool AddressSanitizer::suppressInstrumentationSiteForDebug(int &Instrumented) {
29482940
}
29492941

29502942
bool AddressSanitizer::instrumentFunction(Function &F,
2951-
const TargetLibraryInfo *TLI,
2952-
const TargetTransformInfo *TTI) {
2943+
const TargetLibraryInfo *TLI) {
29532944
if (F.empty())
29542945
return false;
29552946
if (F.getLinkage() == GlobalValue::AvailableExternallyLinkage) return false;
@@ -2989,7 +2980,7 @@ bool AddressSanitizer::instrumentFunction(Function &F,
29892980
// We want to instrument every address only once per basic block (unless there
29902981
// are calls between uses).
29912982
SmallPtrSet<Value *, 16> TempsToInstrument;
2992-
SmallVector<MemoryRefInfo, 16> OperandsToInstrument;
2983+
SmallVector<InterestingMemoryOperand, 16> OperandsToInstrument;
29932984
SmallVector<MemIntrinsic *, 16> IntrinToInstrument;
29942985
SmallVector<Instruction *, 8> NoReturnCalls;
29952986
SmallVector<BasicBlock *, 16> AllBlocks;
@@ -3005,8 +2996,8 @@ bool AddressSanitizer::instrumentFunction(Function &F,
30052996
// Skip instructions inserted by another instrumentation.
30062997
if (Inst.hasMetadata(LLVMContext::MD_nosanitize))
30072998
continue;
3008-
SmallVector<MemoryRefInfo, 1> InterestingOperands;
3009-
getMemoryRefInfos(&Inst, InterestingOperands, TTI);
2999+
SmallVector<InterestingMemoryOperand, 1> InterestingOperands;
3000+
getInterestingMemoryOperands(&Inst, InterestingOperands);
30103001

30113002
if (!InterestingOperands.empty()) {
30123003
for (auto &Operand : InterestingOperands) {

0 commit comments

Comments
 (0)