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[TableGen] Change CGIOperandList::OperandInfo::Rec to const pointer (#107858)
Change CGIOperandList::OperandInfo::Rec and CGIOperandList::TheDef to const pointer. This is a part of effort to have better const correctness in TableGen backends: https://discourse.llvm.org/t/psa-planned-changes-to-tablegen-getallderiveddefinitions-api-potential-downstream-breakages/81089
1 parent a9a5a18 commit bdf0224

19 files changed

+84
-76
lines changed

‎llvm/utils/TableGen/AsmMatcherEmitter.cpp

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -765,10 +765,10 @@ class AsmMatcherInfo {
765765
std::map<Record *, SubtargetFeatureInfo, LessRecordByID> SubtargetFeatures;
766766

767767
/// Map of AsmOperandClass records to their class information.
768-
std::map<Record *, ClassInfo *> AsmOperandClasses;
768+
std::map<const Record *, ClassInfo *> AsmOperandClasses;
769769

770770
/// Map of RegisterClass records to their class information.
771-
std::map<Record *, ClassInfo *> RegisterClassClasses;
771+
std::map<const Record *, ClassInfo *> RegisterClassClasses;
772772

773773
private:
774774
/// Map of token to class information which has already been constructed.
@@ -781,7 +781,7 @@ class AsmMatcherInfo {
781781
/// getOperandClass - Lookup or create the class for the given operand.
782782
ClassInfo *getOperandClass(const CGIOperandList::OperandInfo &OI,
783783
int SubOpIdx);
784-
ClassInfo *getOperandClass(Record *Rec, int SubOpIdx);
784+
ClassInfo *getOperandClass(const Record *Rec, int SubOpIdx);
785785

786786
/// buildRegisterClasses - Build the ClassInfo* instances for register
787787
/// classes.
@@ -1193,13 +1193,13 @@ ClassInfo *AsmMatcherInfo::getTokenClass(StringRef Token) {
11931193
ClassInfo *
11941194
AsmMatcherInfo::getOperandClass(const CGIOperandList::OperandInfo &OI,
11951195
int SubOpIdx) {
1196-
Record *Rec = OI.Rec;
1196+
const Record *Rec = OI.Rec;
11971197
if (SubOpIdx != -1)
11981198
Rec = cast<DefInit>(OI.MIOperandInfo->getArg(SubOpIdx))->getDef();
11991199
return getOperandClass(Rec, SubOpIdx);
12001200
}
12011201

1202-
ClassInfo *AsmMatcherInfo::getOperandClass(Record *Rec, int SubOpIdx) {
1202+
ClassInfo *AsmMatcherInfo::getOperandClass(const Record *Rec, int SubOpIdx) {
12031203
if (Rec->isSubClassOf("RegisterOperand")) {
12041204
// RegisterOperand may have an associated ParserMatchClass. If it does,
12051205
// use it, else just fall back to the underlying register class.
@@ -1210,7 +1210,7 @@ ClassInfo *AsmMatcherInfo::getOperandClass(Record *Rec, int SubOpIdx) {
12101210
"' does not have a ParserMatchClass!\n");
12111211

12121212
if (DefInit *DI = dyn_cast<DefInit>(R->getValue())) {
1213-
Record *MatchClass = DI->getDef();
1213+
const Record *MatchClass = DI->getDef();
12141214
if (ClassInfo *CI = AsmOperandClasses[MatchClass])
12151215
return CI;
12161216
}
@@ -1726,9 +1726,9 @@ void AsmMatcherInfo::buildInstructionOperandReference(MatchableInfo *II,
17261726
// match class for the asm operand is still the default "ImmAsmOperand",
17271727
// then handle each suboperand separately.
17281728
if (Op->SubOpIdx == -1 && Operands[Idx].MINumOperands > 1) {
1729-
Record *Rec = Operands[Idx].Rec;
1729+
const Record *Rec = Operands[Idx].Rec;
17301730
assert(Rec->isSubClassOf("Operand") && "Unexpected operand!");
1731-
Record *MatchClass = Rec->getValueAsDef("ParserMatchClass");
1731+
const Record *MatchClass = Rec->getValueAsDef("ParserMatchClass");
17321732
if (MatchClass && MatchClass->getValueAsString("Name") == "Imm") {
17331733
// Insert remaining suboperands after AsmOpIdx in II->AsmOperands.
17341734
StringRef Token = Op->Token; // save this in case Op gets moved

‎llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp

Lines changed: 9 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -1721,7 +1721,8 @@ bool SDTypeConstraint::ApplyTypeConstraint(TreePatternNode &N,
17211721
// Update the node type to match an instruction operand or result as specified
17221722
// in the ins or outs lists on the instruction definition. Return true if the
17231723
// type was actually changed.
1724-
bool TreePatternNode::UpdateNodeTypeFromInst(unsigned ResNo, Record *Operand,
1724+
bool TreePatternNode::UpdateNodeTypeFromInst(unsigned ResNo,
1725+
const Record *Operand,
17251726
TreePattern &TP) {
17261727
// The 'unknown' operand indicates that types should be inferred from the
17271728
// context.
@@ -1741,7 +1742,7 @@ bool TreePatternNode::UpdateNodeTypeFromInst(unsigned ResNo, Record *Operand,
17411742

17421743
// Both RegisterClass and RegisterOperand operands derive their types from a
17431744
// register class def.
1744-
Record *RC = nullptr;
1745+
const Record *RC = nullptr;
17451746
if (Operand->isSubClassOf("RegisterClass"))
17461747
RC = Operand;
17471748
else if (Operand->isSubClassOf("RegisterOperand"))
@@ -1891,7 +1892,7 @@ static unsigned GetNumNodeResults(Record *Operator, CodeGenDAGPatterns &CDP) {
18911892

18921893
// Subtract any defaulted outputs.
18931894
for (unsigned i = 0; i != InstInfo.Operands.NumDefs; ++i) {
1894-
Record *OperandNode = InstInfo.Operands[i].Rec;
1895+
const Record *OperandNode = InstInfo.Operands[i].Rec;
18951896

18961897
if (OperandNode->isSubClassOf("OperandWithDefaultOps") &&
18971898
!CDP.getDefaultOperand(OperandNode).DefaultOps.empty())
@@ -2627,7 +2628,7 @@ bool TreePatternNode::ApplyTypeConstraints(TreePattern &TP, bool NotRegisters) {
26272628
unsigned ChildNo = 0;
26282629
assert(NumResults <= NumFixedOperands);
26292630
for (unsigned i = NumResults, e = NumFixedOperands; i != e; ++i) {
2630-
Record *OperandNode = InstInfo.Operands[i].Rec;
2631+
const Record *OperandNode = InstInfo.Operands[i].Rec;
26312632

26322633
// If the operand has a default value, do we use it? We must use the
26332634
// default if we've run out of children of the pattern DAG to consume,
@@ -3807,7 +3808,7 @@ void CodeGenDAGPatterns::parseInstructionPattern(CodeGenInstruction &CGI,
38073808
assert(I.getArgList().empty() && "Args list should still be empty here!");
38083809

38093810
// Check that all of the results occur first in the list.
3810-
std::vector<Record *> Results;
3811+
std::vector<const Record *> Results;
38113812
std::vector<unsigned> ResultIndices;
38123813
SmallVector<TreePatternNodePtr, 2> ResNodes;
38133814
for (unsigned i = 0; i != NumResults; ++i) {
@@ -3853,7 +3854,7 @@ void CodeGenDAGPatterns::parseInstructionPattern(CodeGenInstruction &CGI,
38533854

38543855
// Loop over the inputs next.
38553856
std::vector<TreePatternNodePtr> ResultNodeOperands;
3856-
std::vector<Record *> Operands;
3857+
std::vector<const Record *> Operands;
38573858
for (unsigned i = NumResults, e = CGI.Operands.size(); i != e; ++i) {
38583859
CGIOperandList::OperandInfo &Op = CGI.Operands[i];
38593860
const std::string &OpName = Op.Name;
@@ -3961,8 +3962,8 @@ void CodeGenDAGPatterns::ParseInstructions() {
39613962
// is from a multiclass expansion w/ a SDPatternOperator passed in as
39623963
// null_frag.
39633964
if (!LI || LI->empty() || hasNullFragReference(LI)) {
3964-
std::vector<Record *> Results;
3965-
std::vector<Record *> Operands;
3965+
std::vector<const Record *> Results;
3966+
std::vector<const Record *> Operands;
39663967

39673968
CodeGenInstruction &InstInfo = Target.getInstruction(Instr);
39683969

‎llvm/utils/TableGen/Common/CodeGenDAGPatterns.h

Lines changed: 11 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -846,7 +846,8 @@ class TreePatternNode : public RefCountedBase<TreePatternNode> {
846846
// Update node type with types inferred from an instruction operand or result
847847
// def from the ins/outs lists.
848848
// Return true if the type changed.
849-
bool UpdateNodeTypeFromInst(unsigned ResNo, Record *Operand, TreePattern &TP);
849+
bool UpdateNodeTypeFromInst(unsigned ResNo, const Record *Operand,
850+
TreePattern &TP);
850851

851852
/// ContainsUnresolvedType - Return true if this tree contains any
852853
/// unresolved types.
@@ -1010,15 +1011,15 @@ struct DAGDefaultOperand {
10101011
};
10111012

10121013
class DAGInstruction {
1013-
std::vector<Record *> Results;
1014-
std::vector<Record *> Operands;
1014+
std::vector<const Record *> Results;
1015+
std::vector<const Record *> Operands;
10151016
std::vector<Record *> ImpResults;
10161017
TreePatternNodePtr SrcPattern;
10171018
TreePatternNodePtr ResultPattern;
10181019

10191020
public:
1020-
DAGInstruction(std::vector<Record *> &&results,
1021-
std::vector<Record *> &&operands,
1021+
DAGInstruction(std::vector<const Record *> &&results,
1022+
std::vector<const Record *> &&operands,
10221023
std::vector<Record *> &&impresults,
10231024
TreePatternNodePtr srcpattern = nullptr,
10241025
TreePatternNodePtr resultpattern = nullptr)
@@ -1031,12 +1032,12 @@ class DAGInstruction {
10311032
unsigned getNumImpResults() const { return ImpResults.size(); }
10321033
const std::vector<Record *> &getImpResults() const { return ImpResults; }
10331034

1034-
Record *getResult(unsigned RN) const {
1035+
const Record *getResult(unsigned RN) const {
10351036
assert(RN < Results.size());
10361037
return Results[RN];
10371038
}
10381039

1039-
Record *getOperand(unsigned ON) const {
1040+
const Record *getOperand(unsigned ON) const {
10401041
assert(ON < Operands.size());
10411042
return Operands[ON];
10421043
}
@@ -1104,7 +1105,7 @@ class CodeGenDAGPatterns {
11041105
std::map<Record *, ComplexPattern, LessRecordByID> ComplexPatterns;
11051106
std::map<Record *, std::unique_ptr<TreePattern>, LessRecordByID>
11061107
PatternFragments;
1107-
std::map<Record *, DAGDefaultOperand, LessRecordByID> DefaultOperands;
1108+
std::map<const Record *, DAGDefaultOperand, LessRecordByID> DefaultOperands;
11081109
std::map<Record *, DAGInstruction, LessRecordByID> Instructions;
11091110

11101111
// Specific SDNode definitions:
@@ -1173,7 +1174,7 @@ class CodeGenDAGPatterns {
11731174
llvm_unreachable("Unknown intrinsic!");
11741175
}
11751176

1176-
const DAGDefaultOperand &getDefaultOperand(Record *R) const {
1177+
const DAGDefaultOperand &getDefaultOperand(const Record *R) const {
11771178
auto F = DefaultOperands.find(R);
11781179
assert(F != DefaultOperands.end() && "Isn't an analyzed default operand!");
11791180
return F->second;
@@ -1225,7 +1226,7 @@ class CodeGenDAGPatterns {
12251226

12261227
unsigned allocateScope() { return ++NumScopes; }
12271228

1228-
bool operandHasDefault(Record *Op) const {
1229+
bool operandHasDefault(const Record *Op) const {
12291230
return Op->isSubClassOf("OperandWithDefaultOps") &&
12301231
!getDefaultOperand(Op).DefaultOps.empty();
12311232
}

‎llvm/utils/TableGen/Common/CodeGenInstAlias.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -25,7 +25,7 @@ using namespace llvm;
2525
/// the corresponding operand of the instruction. It returns true on a
2626
/// successful match, with ResOp set to the result operand to be used.
2727
bool CodeGenInstAlias::tryAliasOpMatch(DagInit *Result, unsigned AliasOpNo,
28-
Record *InstOpRec, bool hasSubOps,
28+
const Record *InstOpRec, bool hasSubOps,
2929
ArrayRef<SMLoc> Loc, CodeGenTarget &T,
3030
ResultOperand &ResOp) {
3131
Init *Arg = Result->getArg(AliasOpNo);
@@ -216,7 +216,7 @@ CodeGenInstAlias::CodeGenInstAlias(Record *R, CodeGenTarget &T) : TheDef(R) {
216216
if (AliasOpNo >= Result->getNumArgs())
217217
PrintFatalError(R->getLoc(), "not enough arguments for instruction!");
218218

219-
Record *InstOpRec = ResultInst->Operands[i].Rec;
219+
const Record *InstOpRec = ResultInst->Operands[i].Rec;
220220
unsigned NumSubOps = ResultInst->Operands[i].MINumOperands;
221221
ResultOperand ResOp(static_cast<int64_t>(0));
222222
if (tryAliasOpMatch(Result, AliasOpNo, InstOpRec, (NumSubOps > 1),

‎llvm/utils/TableGen/Common/CodeGenInstAlias.h

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -95,8 +95,9 @@ class CodeGenInstAlias {
9595

9696
CodeGenInstAlias(Record *R, CodeGenTarget &T);
9797

98-
bool tryAliasOpMatch(DagInit *Result, unsigned AliasOpNo, Record *InstOpRec,
99-
bool hasSubOps, ArrayRef<SMLoc> Loc, CodeGenTarget &T,
98+
bool tryAliasOpMatch(DagInit *Result, unsigned AliasOpNo,
99+
const Record *InstOpRec, bool hasSubOps,
100+
ArrayRef<SMLoc> Loc, CodeGenTarget &T,
100101
ResultOperand &ResOp);
101102
};
102103

‎llvm/utils/TableGen/Common/CodeGenInstruction.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -22,7 +22,7 @@ using namespace llvm;
2222
// CGIOperandList Implementation
2323
//===----------------------------------------------------------------------===//
2424

25-
CGIOperandList::CGIOperandList(Record *R) : TheDef(R) {
25+
CGIOperandList::CGIOperandList(const Record *R) : TheDef(R) {
2626
isPredicable = false;
2727
hasOptionalDef = false;
2828
isVariadic = false;
@@ -75,7 +75,7 @@ CGIOperandList::CGIOperandList(Record *R) : TheDef(R) {
7575
PrintFatalError(R->getLoc(), "Illegal operand for the '" + R->getName() +
7676
"' instruction!");
7777

78-
Record *Rec = Arg->getDef();
78+
const Record *Rec = Arg->getDef();
7979
std::string PrintMethod = "printOperand";
8080
std::string EncoderMethod;
8181
std::string OperandType = "OPERAND_UNKNOWN";

‎llvm/utils/TableGen/Common/CodeGenInstruction.h

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -73,7 +73,7 @@ class CGIOperandList {
7373
struct OperandInfo {
7474
/// Rec - The definition this operand is declared as.
7575
///
76-
Record *Rec;
76+
const Record *Rec;
7777

7878
/// Name - If this operand was assigned a symbolic name, this is it,
7979
/// otherwise, it's empty.
@@ -116,7 +116,7 @@ class CGIOperandList {
116116
/// track constraint info for each.
117117
std::vector<ConstraintInfo> Constraints;
118118

119-
OperandInfo(Record *R, const std::string &N, const std::string &PMN,
119+
OperandInfo(const Record *R, const std::string &N, const std::string &PMN,
120120
const std::string &OT, unsigned MION, unsigned MINO,
121121
DagInit *MIOI)
122122
: Rec(R), Name(N), SubOpNames(MINO), PrinterMethodName(PMN),
@@ -136,9 +136,9 @@ class CGIOperandList {
136136
}
137137
};
138138

139-
CGIOperandList(Record *D);
139+
CGIOperandList(const Record *D);
140140

141-
Record *TheDef; // The actual record containing this OperandList.
141+
const Record *TheDef; // The actual record containing this OperandList.
142142

143143
/// NumDefs - Number of def operands declared, this is the number of
144144
/// elements in the instruction's (outs) list.

‎llvm/utils/TableGen/Common/CodeGenRegisters.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1348,7 +1348,7 @@ CodeGenRegister *CodeGenRegBank::getReg(const Record *Def) {
13481348
}
13491349

13501350
void CodeGenRegBank::addToMaps(CodeGenRegisterClass *RC) {
1351-
if (Record *Def = RC->getDef())
1351+
if (const Record *Def = RC->getDef())
13521352
Def2RC.insert(std::pair(Def, RC));
13531353

13541354
// Duplicate classes are rejected by insert().

‎llvm/utils/TableGen/Common/CodeGenRegisters.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -606,7 +606,7 @@ class CodeGenRegBank {
606606

607607
// Register classes.
608608
std::list<CodeGenRegisterClass> RegClasses;
609-
DenseMap<Record *, CodeGenRegisterClass *> Def2RC;
609+
DenseMap<const Record *, CodeGenRegisterClass *> Def2RC;
610610
typedef std::map<CodeGenRegisterClass::Key, CodeGenRegisterClass *> RCKeyMap;
611611
RCKeyMap Key2RC;
612612

‎llvm/utils/TableGen/Common/CodeGenTarget.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -234,7 +234,8 @@ const CodeGenRegister *CodeGenTarget::getRegisterByName(StringRef Name) const {
234234
return getRegBank().getRegistersByName().lookup(Name);
235235
}
236236

237-
const CodeGenRegisterClass &CodeGenTarget::getRegisterClass(Record *R) const {
237+
const CodeGenRegisterClass &
238+
CodeGenTarget::getRegisterClass(const Record *R) const {
238239
return *getRegBank().getRegClass(R);
239240
}
240241

‎llvm/utils/TableGen/Common/CodeGenTarget.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -141,7 +141,7 @@ class CodeGenTarget {
141141
return RegAltNameIndices;
142142
}
143143

144-
const CodeGenRegisterClass &getRegisterClass(Record *R) const;
144+
const CodeGenRegisterClass &getRegisterClass(const Record *R) const;
145145

146146
/// getRegisterVTs - Find the union of all possible SimpleValueTypes for the
147147
/// specified physical register.

‎llvm/utils/TableGen/CompressInstEmitter.cpp

Lines changed: 8 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -127,8 +127,9 @@ class CompressInstEmitter {
127127
IndexedMap<OpData> &OperandMap, bool IsSourceInst);
128128
void evaluateCompressPat(Record *Compress);
129129
void emitCompressInstEmitter(raw_ostream &OS, EmitterType EType);
130-
bool validateTypes(Record *SubType, Record *Type, bool IsSourceInst);
131-
bool validateRegister(Record *Reg, Record *RegClass);
130+
bool validateTypes(const Record *DagOpType, const Record *InstOpType,
131+
bool IsSourceInst);
132+
bool validateRegister(const Record *Reg, const Record *RegClass);
132133
void createDagOperandMapping(Record *Rec, StringMap<unsigned> &SourceOperands,
133134
StringMap<unsigned> &DestOperands,
134135
DagInit *SourceDag, DagInit *DestDag,
@@ -148,7 +149,8 @@ class CompressInstEmitter {
148149
};
149150
} // End anonymous namespace.
150151

151-
bool CompressInstEmitter::validateRegister(Record *Reg, Record *RegClass) {
152+
bool CompressInstEmitter::validateRegister(const Record *Reg,
153+
const Record *RegClass) {
152154
assert(Reg->isSubClassOf("Register") && "Reg record should be a Register");
153155
assert(RegClass->isSubClassOf("RegisterClass") &&
154156
"RegClass record should be a RegisterClass");
@@ -158,7 +160,8 @@ bool CompressInstEmitter::validateRegister(Record *Reg, Record *RegClass) {
158160
return RC.contains(R);
159161
}
160162

161-
bool CompressInstEmitter::validateTypes(Record *DagOpType, Record *InstOpType,
163+
bool CompressInstEmitter::validateTypes(const Record *DagOpType,
164+
const Record *InstOpType,
162165
bool IsSourceInst) {
163166
if (DagOpType == InstOpType)
164167
return true;
@@ -522,7 +525,7 @@ getReqFeatures(std::set<std::pair<bool, StringRef>> &FeaturesSet,
522525

523526
static unsigned getPredicates(DenseMap<const Record *, unsigned> &PredicateMap,
524527
std::vector<const Record *> &Predicates,
525-
Record *Rec, StringRef Name) {
528+
const Record *Rec, StringRef Name) {
526529
unsigned &Entry = PredicateMap[Rec];
527530
if (Entry)
528531
return Entry;

‎llvm/utils/TableGen/DAGISelMatcherGen.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -824,7 +824,7 @@ void MatcherGen::EmitResultInstructionAsOperand(
824824
for (unsigned InstOpNo = NumResults, e = NumFixedOperands; InstOpNo != e;
825825
++InstOpNo) {
826826
// Determine what to emit for this operand.
827-
Record *OperandNode = II.Operands[InstOpNo].Rec;
827+
const Record *OperandNode = II.Operands[InstOpNo].Rec;
828828
if (CGP.operandHasDefault(OperandNode) &&
829829
(InstOpNo < NonOverridableOperands || ChildNo >= N.getNumChildren())) {
830830
// This is a predicate or optional def operand which the pattern has not

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