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[LV] Generate check lines for if-conversion.ll
The limited check lines make it difficult to reason about test changes in #128375.
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‎llvm/test/Transforms/LoopVectorize/if-conversion.ll

Lines changed: 158 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,4 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals none --version 5
12
; RUN: opt < %s -passes=loop-vectorize,dce,instcombine -force-vector-interleave=1 -force-vector-width=4 -enable-if-conversion -S | FileCheck %s
23

34
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
@@ -16,14 +17,85 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f3
1617
; }
1718
;}
1819

19-
;CHECK-LABEL: @function0(
20-
;CHECK: load <4 x i32>
21-
;CHECK: icmp sgt <4 x i32>
22-
;CHECK: mul <4 x i32>
23-
;CHECK: add <4 x i32>
24-
;CHECK: select <4 x i1>
25-
;CHECK: ret i32
2620
define i32 @function0(ptr nocapture %a, ptr nocapture %b, i32 %start, i32 %end) nounwind uwtable ssp {
21+
; CHECK-LABEL: define i32 @function0(
22+
; CHECK-SAME: ptr captures(none) [[A:%.*]], ptr captures(none) [[B:%.*]], i32 [[START:%.*]], i32 [[END:%.*]]) #[[ATTR0:[0-9]+]] {
23+
; CHECK-NEXT: [[ENTRY:.*:]]
24+
; CHECK-NEXT: [[CMP16:%.*]] = icmp slt i32 [[START]], [[END]]
25+
; CHECK-NEXT: br i1 [[CMP16]], label %[[FOR_BODY_LR_PH:.*]], label %[[FOR_END:.*]]
26+
; CHECK: [[FOR_BODY_LR_PH]]:
27+
; CHECK-NEXT: [[TMP0:%.*]] = sext i32 [[START]] to i64
28+
; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[START]], -1
29+
; CHECK-NEXT: [[TMP2:%.*]] = add i32 [[END]], [[TMP1]]
30+
; CHECK-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64
31+
; CHECK-NEXT: [[TMP4:%.*]] = add nuw nsw i64 [[TMP3]], 1
32+
; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[TMP2]], 3
33+
; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]]
34+
; CHECK: [[VECTOR_MEMCHECK]]:
35+
; CHECK-NEXT: [[TMP5:%.*]] = shl nsw i64 [[TMP0]], 2
36+
; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[A]], i64 [[TMP5]]
37+
; CHECK-NEXT: [[TMP6:%.*]] = xor i32 [[START]], -1
38+
; CHECK-NEXT: [[TMP7:%.*]] = add i32 [[END]], [[TMP6]]
39+
; CHECK-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
40+
; CHECK-NEXT: [[TMP9:%.*]] = add nsw i64 [[TMP0]], [[TMP8]]
41+
; CHECK-NEXT: [[TMP10:%.*]] = shl nsw i64 [[TMP9]], 2
42+
; CHECK-NEXT: [[TMP11:%.*]] = add nsw i64 [[TMP10]], 4
43+
; CHECK-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, ptr [[A]], i64 [[TMP11]]
44+
; CHECK-NEXT: [[SCEVGEP2:%.*]] = getelementptr i8, ptr [[B]], i64 [[TMP5]]
45+
; CHECK-NEXT: [[SCEVGEP3:%.*]] = getelementptr i8, ptr [[B]], i64 [[TMP11]]
46+
; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult ptr [[SCEVGEP]], [[SCEVGEP3]]
47+
; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult ptr [[SCEVGEP2]], [[SCEVGEP1]]
48+
; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]
49+
; CHECK-NEXT: br i1 [[FOUND_CONFLICT]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]]
50+
; CHECK: [[VECTOR_PH]]:
51+
; CHECK-NEXT: [[N_VEC:%.*]] = and i64 [[TMP4]], 8589934588
52+
; CHECK-NEXT: [[TMP12:%.*]] = add nsw i64 [[N_VEC]], [[TMP0]]
53+
; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
54+
; CHECK: [[VECTOR_BODY]]:
55+
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
56+
; CHECK-NEXT: [[OFFSET_IDX:%.*]] = add i64 [[INDEX]], [[TMP0]]
57+
; CHECK-NEXT: [[TMP13:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[OFFSET_IDX]]
58+
; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP13]], align 4, !alias.scope [[META0:![0-9]+]], !noalias [[META3:![0-9]+]]
59+
; CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[OFFSET_IDX]]
60+
; CHECK-NEXT: [[WIDE_LOAD4:%.*]] = load <4 x i32>, ptr [[TMP14]], align 4, !alias.scope [[META3]]
61+
; CHECK-NEXT: [[DOTNOT:%.*]] = icmp sgt <4 x i32> [[WIDE_LOAD]], [[WIDE_LOAD4]]
62+
; CHECK-NEXT: [[TMP15:%.*]] = mul <4 x i32> [[WIDE_LOAD]], splat (i32 5)
63+
; CHECK-NEXT: [[TMP16:%.*]] = add <4 x i32> [[TMP15]], splat (i32 3)
64+
; CHECK-NEXT: [[PREDPHI:%.*]] = select <4 x i1> [[DOTNOT]], <4 x i32> [[TMP16]], <4 x i32> [[WIDE_LOAD]]
65+
; CHECK-NEXT: store <4 x i32> [[PREDPHI]], ptr [[TMP13]], align 4, !alias.scope [[META0]], !noalias [[META3]]
66+
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
67+
; CHECK-NEXT: [[TMP17:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
68+
; CHECK-NEXT: br i1 [[TMP17]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]]
69+
; CHECK: [[MIDDLE_BLOCK]]:
70+
; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP4]], [[N_VEC]]
71+
; CHECK-NEXT: br i1 [[CMP_N]], label %[[FOR_END_LOOPEXIT:.*]], label %[[SCALAR_PH]]
72+
; CHECK: [[SCALAR_PH]]:
73+
; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[TMP12]], %[[MIDDLE_BLOCK]] ], [ [[TMP0]], %[[FOR_BODY_LR_PH]] ], [ [[TMP0]], %[[VECTOR_MEMCHECK]] ]
74+
; CHECK-NEXT: br label %[[FOR_BODY:.*]]
75+
; CHECK: [[FOR_BODY]]:
76+
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[IF_END:.*]] ]
77+
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[INDVARS_IV]]
78+
; CHECK-NEXT: [[TMP18:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
79+
; CHECK-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[INDVARS_IV]]
80+
; CHECK-NEXT: [[TMP19:%.*]] = load i32, ptr [[ARRAYIDX4]], align 4
81+
; CHECK-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP18]], [[TMP19]]
82+
; CHECK-NEXT: br i1 [[CMP5]], label %[[IF_THEN:.*]], label %[[IF_END]]
83+
; CHECK: [[IF_THEN]]:
84+
; CHECK-NEXT: [[MUL:%.*]] = mul i32 [[TMP18]], 5
85+
; CHECK-NEXT: [[ADD:%.*]] = add i32 [[MUL]], 3
86+
; CHECK-NEXT: br label %[[IF_END]]
87+
; CHECK: [[IF_END]]:
88+
; CHECK-NEXT: [[K_0:%.*]] = phi i32 [ [[ADD]], %[[IF_THEN]] ], [ [[TMP18]], %[[FOR_BODY]] ]
89+
; CHECK-NEXT: store i32 [[K_0]], ptr [[ARRAYIDX]], align 4
90+
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add i64 [[INDVARS_IV]], 1
91+
; CHECK-NEXT: [[TMP20:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32
92+
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[END]], [[TMP20]]
93+
; CHECK-NEXT: br i1 [[CMP]], label %[[FOR_BODY]], label %[[FOR_END_LOOPEXIT]], !llvm.loop [[LOOP8:![0-9]+]]
94+
; CHECK: [[FOR_END_LOOPEXIT]]:
95+
; CHECK-NEXT: br label %[[FOR_END]]
96+
; CHECK: [[FOR_END]]:
97+
; CHECK-NEXT: ret i32 undef
98+
;
2799
entry:
28100
%cmp16 = icmp slt i32 %start, %end
29101
br i1 %cmp16, label %for.body.lr.ph, label %for.end
@@ -69,13 +141,63 @@ for.end:
69141
; return sum;
70142
; }
71143

72-
;CHECK-LABEL: @reduction_func(
73-
;CHECK: load <4 x i32>
74-
;CHECK: icmp slt <4 x i32>
75-
;CHECK: add <4 x i32>
76-
;CHECK: select <4 x i1>
77-
;CHECK: ret i32
78144
define i32 @reduction_func(ptr nocapture %A, i32 %n) nounwind uwtable readonly ssp {
145+
; CHECK-LABEL: define i32 @reduction_func(
146+
; CHECK-SAME: ptr captures(none) [[A:%.*]], i32 [[N:%.*]]) #[[ATTR1:[0-9]+]] {
147+
; CHECK-NEXT: [[ENTRY:.*]]:
148+
; CHECK-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[N]], 0
149+
; CHECK-NEXT: br i1 [[CMP10]], label %[[FOR_BODY_PREHEADER:.*]], label %[[FOR_END:.*]]
150+
; CHECK: [[FOR_BODY_PREHEADER]]:
151+
; CHECK-NEXT: [[TMP0:%.*]] = zext nneg i32 [[N]] to i64
152+
; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[N]], 4
153+
; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
154+
; CHECK: [[VECTOR_PH]]:
155+
; CHECK-NEXT: [[N_VEC:%.*]] = and i64 [[TMP0]], 2147483644
156+
; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
157+
; CHECK: [[VECTOR_BODY]]:
158+
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
159+
; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PREDPHI:%.*]], %[[VECTOR_BODY]] ]
160+
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[INDEX]]
161+
; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP1]], align 4
162+
; CHECK-NEXT: [[TMP2:%.*]] = icmp slt <4 x i32> [[WIDE_LOAD]], splat (i32 31)
163+
; CHECK-NEXT: [[TMP3:%.*]] = add <4 x i32> [[VEC_PHI]], splat (i32 2)
164+
; CHECK-NEXT: [[TMP4:%.*]] = add <4 x i32> [[TMP3]], [[WIDE_LOAD]]
165+
; CHECK-NEXT: [[PREDPHI]] = select <4 x i1> [[TMP2]], <4 x i32> [[VEC_PHI]], <4 x i32> [[TMP4]]
166+
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
167+
; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
168+
; CHECK-NEXT: br i1 [[TMP5]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP9:![0-9]+]]
169+
; CHECK: [[MIDDLE_BLOCK]]:
170+
; CHECK-NEXT: [[TMP6:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[PREDPHI]])
171+
; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N_VEC]], [[TMP0]]
172+
; CHECK-NEXT: br i1 [[CMP_N]], label %[[FOR_END_LOOPEXIT:.*]], label %[[SCALAR_PH]]
173+
; CHECK: [[SCALAR_PH]]:
174+
; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[FOR_BODY_PREHEADER]] ]
175+
; CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi i32 [ [[TMP6]], %[[MIDDLE_BLOCK]] ], [ 0, %[[FOR_BODY_PREHEADER]] ]
176+
; CHECK-NEXT: br label %[[FOR_BODY:.*]]
177+
; CHECK: [[FOR_BODY]]:
178+
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_INC:.*]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ]
179+
; CHECK-NEXT: [[SUM_011:%.*]] = phi i32 [ [[SUM_1:%.*]], %[[FOR_INC]] ], [ [[BC_MERGE_RDX]], %[[SCALAR_PH]] ]
180+
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[INDVARS_IV]]
181+
; CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
182+
; CHECK-NEXT: [[CMP1:%.*]] = icmp sgt i32 [[TMP7]], 30
183+
; CHECK-NEXT: br i1 [[CMP1]], label %[[IF_THEN:.*]], label %[[FOR_INC]]
184+
; CHECK: [[IF_THEN]]:
185+
; CHECK-NEXT: [[ADD:%.*]] = add i32 [[SUM_011]], 2
186+
; CHECK-NEXT: [[ADD4:%.*]] = add i32 [[ADD]], [[TMP7]]
187+
; CHECK-NEXT: br label %[[FOR_INC]]
188+
; CHECK: [[FOR_INC]]:
189+
; CHECK-NEXT: [[SUM_1]] = phi i32 [ [[ADD4]], %[[IF_THEN]] ], [ [[SUM_011]], %[[FOR_BODY]] ]
190+
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add i64 [[INDVARS_IV]], 1
191+
; CHECK-NEXT: [[LFTR_WIDEIV:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32
192+
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[N]], [[LFTR_WIDEIV]]
193+
; CHECK-NEXT: br i1 [[EXITCOND]], label %[[FOR_END_LOOPEXIT]], label %[[FOR_BODY]], !llvm.loop [[LOOP10:![0-9]+]]
194+
; CHECK: [[FOR_END_LOOPEXIT]]:
195+
; CHECK-NEXT: [[SUM_1_LCSSA:%.*]] = phi i32 [ [[SUM_1]], %[[FOR_INC]] ], [ [[TMP6]], %[[MIDDLE_BLOCK]] ]
196+
; CHECK-NEXT: br label %[[FOR_END]]
197+
; CHECK: [[FOR_END]]:
198+
; CHECK-NEXT: [[SUM_0_LCSSA:%.*]] = phi i32 [ 0, %[[ENTRY]] ], [ [[SUM_1_LCSSA]], %[[FOR_END_LOOPEXIT]] ]
199+
; CHECK-NEXT: ret i32 [[SUM_0_LCSSA]]
200+
;
79201
entry:
80202
%cmp10 = icmp sgt i32 %n, 0
81203
br i1 %cmp10, label %for.body, label %for.end
@@ -119,6 +241,29 @@ for.end: ; preds = %for.inc, %entry
119241
; CHECK: vector.body
120242

121243
define void @PR34523() {
244+
; CHECK-LABEL: define void @PR34523() {
245+
; CHECK-NEXT: [[BB1:.*:]]
246+
; CHECK-NEXT: br i1 true, label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
247+
; CHECK: [[VECTOR_PH]]:
248+
; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
249+
; CHECK: [[VECTOR_BODY]]:
250+
; CHECK-NEXT: br i1 poison, label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP11:![0-9]+]]
251+
; CHECK: [[MIDDLE_BLOCK]]:
252+
; CHECK-NEXT: br i1 poison, label %[[BB5:.*]], label %[[SCALAR_PH]]
253+
; CHECK: [[SCALAR_PH]]:
254+
; CHECK-NEXT: br label %[[BB2:.*]]
255+
; CHECK: [[BB2]]:
256+
; CHECK-NEXT: [[I:%.*]] = phi i16 [ undef, %[[SCALAR_PH]] ], [ [[_TMP2:%.*]], %[[BB4:.*]] ]
257+
; CHECK-NEXT: br label %[[BB3:.*]]
258+
; CHECK: [[BB3]]:
259+
; CHECK-NEXT: br label %[[BB4]]
260+
; CHECK: [[BB4]]:
261+
; CHECK-NEXT: [[_TMP2]] = add i16 [[I]], 1
262+
; CHECK-NEXT: [[_TMP3:%.*]] = icmp slt i16 [[_TMP2]], 2
263+
; CHECK-NEXT: br i1 [[_TMP3]], label %[[BB2]], label %[[BB5]], !llvm.loop [[LOOP12:![0-9]+]]
264+
; CHECK: [[BB5]]:
265+
; CHECK-NEXT: unreachable
266+
;
122267
bb1:
123268
br label %bb2
124269

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