Move PreferSmallerInstructions to AsmParser

Author: AlfieRichardsArm

llvm/include/llvm/Target/Target.td

@@ -1564,6 +1564,10 @@ class AsmParser {
   // method shall be called for all operands as opposed to only those
   // that have their own specified custom parsers.
   bit CallCustomParserForAllOperands = false;
+
+  // PreferSmallerInstructions - Should the assembly matcher prefer the smaller
+  // instructions.
+  bit PreferSmallerInstructions = false;
 }
 def DefaultAsmParser : AsmParser;
 
@@ -1743,11 +1747,6 @@ class Target {
   // setting hasExtraDefRegAllocReq and hasExtraSrcRegAllocReq to 1
   // for all opcodes if this flag is set to 0.
   int AllowRegisterRenaming = 0;
-
-  // PreferSmallerInstructions - Should the assembly matcher prefer the smaller
-  // instructions. 1 if the instruction set should sort by size,
-  // 0 otherwise.
-  bit PreferSmallerInstructions = 0;
 }
 
 //===----------------------------------------------------------------------===//

llvm/utils/TableGen/CodeGenTarget.cpp

@@ -332,10 +332,6 @@ bool CodeGenTarget::getAllowRegisterRenaming() const {
   return TargetRec->getValueAsInt("AllowRegisterRenaming");
 }
 
-bool CodeGenTarget::getPreferSmallerInstructions() const {
-  return TargetRec->getValueAsBit("PreferSmallerInstructions");
-}
-
 /// getAsmParser - Return the AssemblyParser definition for this target.
 ///
 Record *CodeGenTarget::getAsmParser() const {
@@ -346,6 +342,10 @@ Record *CodeGenTarget::getAsmParser() const {
   return LI[AsmParserNum];
 }
 
+bool CodeGenTarget::getPreferSmallerInstructions() const {
+  return getAsmParser()->getValueAsBit("PreferSmallerInstructions");
+}
+
 /// getAsmParserVariant - Return the AssemblyParserVariant definition for
 /// this target.
 ///