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[RISCV] Add tests where we could use Zbs instructions in constant materialization. NFC
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llvm/test/CodeGen/RISCV/imm.ll

Lines changed: 116 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3994,3 +3994,119 @@ define i64 @imm64_same_lo_hi_negative() nounwind {
39943994
; RV64-REMAT-NEXT: ret
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ret i64 9259542123273814144 ; 0x8080808080808080
39963996
}
3997+
3998+
define i64 @imm64_0x8000080000000() {
3999+
; RV32I-LABEL: imm64_0x8000080000000:
4000+
; RV32I: # %bb.0:
4001+
; RV32I-NEXT: lui a0, 524288
4002+
; RV32I-NEXT: lui a1, 128
4003+
; RV32I-NEXT: ret
4004+
;
4005+
; RV64I-LABEL: imm64_0x8000080000000:
4006+
; RV64I: # %bb.0:
4007+
; RV64I-NEXT: lui a0, 256
4008+
; RV64I-NEXT: addiw a0, a0, 1
4009+
; RV64I-NEXT: slli a0, a0, 31
4010+
; RV64I-NEXT: ret
4011+
;
4012+
; RV64IZBA-LABEL: imm64_0x8000080000000:
4013+
; RV64IZBA: # %bb.0:
4014+
; RV64IZBA-NEXT: lui a0, 256
4015+
; RV64IZBA-NEXT: addiw a0, a0, 1
4016+
; RV64IZBA-NEXT: slli a0, a0, 31
4017+
; RV64IZBA-NEXT: ret
4018+
;
4019+
; RV64IZBB-LABEL: imm64_0x8000080000000:
4020+
; RV64IZBB: # %bb.0:
4021+
; RV64IZBB-NEXT: lui a0, 256
4022+
; RV64IZBB-NEXT: addiw a0, a0, 1
4023+
; RV64IZBB-NEXT: slli a0, a0, 31
4024+
; RV64IZBB-NEXT: ret
4025+
;
4026+
; RV64IZBS-LABEL: imm64_0x8000080000000:
4027+
; RV64IZBS: # %bb.0:
4028+
; RV64IZBS-NEXT: lui a0, 256
4029+
; RV64IZBS-NEXT: addiw a0, a0, 1
4030+
; RV64IZBS-NEXT: slli a0, a0, 31
4031+
; RV64IZBS-NEXT: ret
4032+
;
4033+
; RV64IXTHEADBB-LABEL: imm64_0x8000080000000:
4034+
; RV64IXTHEADBB: # %bb.0:
4035+
; RV64IXTHEADBB-NEXT: lui a0, 256
4036+
; RV64IXTHEADBB-NEXT: addiw a0, a0, 1
4037+
; RV64IXTHEADBB-NEXT: slli a0, a0, 31
4038+
; RV64IXTHEADBB-NEXT: ret
4039+
;
4040+
; RV32-REMAT-LABEL: imm64_0x8000080000000:
4041+
; RV32-REMAT: # %bb.0:
4042+
; RV32-REMAT-NEXT: lui a0, 524288
4043+
; RV32-REMAT-NEXT: lui a1, 128
4044+
; RV32-REMAT-NEXT: ret
4045+
;
4046+
; RV64-REMAT-LABEL: imm64_0x8000080000000:
4047+
; RV64-REMAT: # %bb.0:
4048+
; RV64-REMAT-NEXT: lui a0, 256
4049+
; RV64-REMAT-NEXT: addiw a0, a0, 1
4050+
; RV64-REMAT-NEXT: slli a0, a0, 31
4051+
; RV64-REMAT-NEXT: ret
4052+
ret i64 2251801961168896 ; 0x8000080000000
4053+
}
4054+
4055+
define i64 @imm64_0x10000100000000() {
4056+
; RV32I-LABEL: imm64_0x10000100000000:
4057+
; RV32I: # %bb.0:
4058+
; RV32I-NEXT: lui a1, 256
4059+
; RV32I-NEXT: addi a1, a1, 1
4060+
; RV32I-NEXT: li a0, 0
4061+
; RV32I-NEXT: ret
4062+
;
4063+
; RV64I-LABEL: imm64_0x10000100000000:
4064+
; RV64I: # %bb.0:
4065+
; RV64I-NEXT: lui a0, 256
4066+
; RV64I-NEXT: addi a0, a0, 1
4067+
; RV64I-NEXT: slli a0, a0, 32
4068+
; RV64I-NEXT: ret
4069+
;
4070+
; RV64IZBA-LABEL: imm64_0x10000100000000:
4071+
; RV64IZBA: # %bb.0:
4072+
; RV64IZBA-NEXT: lui a0, 256
4073+
; RV64IZBA-NEXT: addi a0, a0, 1
4074+
; RV64IZBA-NEXT: slli a0, a0, 32
4075+
; RV64IZBA-NEXT: ret
4076+
;
4077+
; RV64IZBB-LABEL: imm64_0x10000100000000:
4078+
; RV64IZBB: # %bb.0:
4079+
; RV64IZBB-NEXT: lui a0, 256
4080+
; RV64IZBB-NEXT: addi a0, a0, 1
4081+
; RV64IZBB-NEXT: slli a0, a0, 32
4082+
; RV64IZBB-NEXT: ret
4083+
;
4084+
; RV64IZBS-LABEL: imm64_0x10000100000000:
4085+
; RV64IZBS: # %bb.0:
4086+
; RV64IZBS-NEXT: lui a0, 256
4087+
; RV64IZBS-NEXT: addi a0, a0, 1
4088+
; RV64IZBS-NEXT: slli a0, a0, 32
4089+
; RV64IZBS-NEXT: ret
4090+
;
4091+
; RV64IXTHEADBB-LABEL: imm64_0x10000100000000:
4092+
; RV64IXTHEADBB: # %bb.0:
4093+
; RV64IXTHEADBB-NEXT: lui a0, 256
4094+
; RV64IXTHEADBB-NEXT: addi a0, a0, 1
4095+
; RV64IXTHEADBB-NEXT: slli a0, a0, 32
4096+
; RV64IXTHEADBB-NEXT: ret
4097+
;
4098+
; RV32-REMAT-LABEL: imm64_0x10000100000000:
4099+
; RV32-REMAT: # %bb.0:
4100+
; RV32-REMAT-NEXT: lui a1, 256
4101+
; RV32-REMAT-NEXT: addi a1, a1, 1
4102+
; RV32-REMAT-NEXT: li a0, 0
4103+
; RV32-REMAT-NEXT: ret
4104+
;
4105+
; RV64-REMAT-LABEL: imm64_0x10000100000000:
4106+
; RV64-REMAT: # %bb.0:
4107+
; RV64-REMAT-NEXT: lui a0, 256
4108+
; RV64-REMAT-NEXT: addi a0, a0, 1
4109+
; RV64-REMAT-NEXT: slli a0, a0, 32
4110+
; RV64-REMAT-NEXT: ret
4111+
ret i64 4503603922337792 ; 0x10000100000000
4112+
}

llvm/test/CodeGen/RISCV/rv64-legal-i32/imm.ll

Lines changed: 137 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2562,3 +2562,140 @@ define i64 @imm64_same_lo_hi_optsize() nounwind optsize {
25622562
; RV64IXTHEADBB-NEXT: ret
25632563
ret i64 1157442765409226768 ; 0x0101010101010101
25642564
}
2565+
; Hi and lo are the same and also negative.
2566+
define i64 @imm64_same_lo_hi_negative() nounwind {
2567+
; RV64-NOPOOL-LABEL: imm64_same_lo_hi_negative:
2568+
; RV64-NOPOOL: # %bb.0:
2569+
; RV64-NOPOOL-NEXT: lui a0, 983297
2570+
; RV64-NOPOOL-NEXT: slli a0, a0, 4
2571+
; RV64-NOPOOL-NEXT: addi a0, a0, 257
2572+
; RV64-NOPOOL-NEXT: slli a0, a0, 16
2573+
; RV64-NOPOOL-NEXT: addi a0, a0, 257
2574+
; RV64-NOPOOL-NEXT: slli a0, a0, 15
2575+
; RV64-NOPOOL-NEXT: addi a0, a0, 128
2576+
; RV64-NOPOOL-NEXT: ret
2577+
;
2578+
; RV64I-POOL-LABEL: imm64_same_lo_hi_negative:
2579+
; RV64I-POOL: # %bb.0:
2580+
; RV64I-POOL-NEXT: lui a0, %hi(.LCPI65_0)
2581+
; RV64I-POOL-NEXT: ld a0, %lo(.LCPI65_0)(a0)
2582+
; RV64I-POOL-NEXT: ret
2583+
;
2584+
; RV64IZBA-LABEL: imm64_same_lo_hi_negative:
2585+
; RV64IZBA: # %bb.0:
2586+
; RV64IZBA-NEXT: lui a0, 526344
2587+
; RV64IZBA-NEXT: addi a0, a0, 128
2588+
; RV64IZBA-NEXT: slli a1, a0, 32
2589+
; RV64IZBA-NEXT: add.uw a0, a0, a1
2590+
; RV64IZBA-NEXT: ret
2591+
;
2592+
; RV64IZBB-LABEL: imm64_same_lo_hi_negative:
2593+
; RV64IZBB: # %bb.0:
2594+
; RV64IZBB-NEXT: lui a0, 983297
2595+
; RV64IZBB-NEXT: slli a0, a0, 4
2596+
; RV64IZBB-NEXT: addi a0, a0, 257
2597+
; RV64IZBB-NEXT: slli a0, a0, 16
2598+
; RV64IZBB-NEXT: addi a0, a0, 257
2599+
; RV64IZBB-NEXT: slli a0, a0, 15
2600+
; RV64IZBB-NEXT: addi a0, a0, 128
2601+
; RV64IZBB-NEXT: ret
2602+
;
2603+
; RV64IZBS-LABEL: imm64_same_lo_hi_negative:
2604+
; RV64IZBS: # %bb.0:
2605+
; RV64IZBS-NEXT: lui a0, 983297
2606+
; RV64IZBS-NEXT: slli a0, a0, 4
2607+
; RV64IZBS-NEXT: addi a0, a0, 257
2608+
; RV64IZBS-NEXT: slli a0, a0, 16
2609+
; RV64IZBS-NEXT: addi a0, a0, 257
2610+
; RV64IZBS-NEXT: slli a0, a0, 15
2611+
; RV64IZBS-NEXT: addi a0, a0, 128
2612+
; RV64IZBS-NEXT: ret
2613+
;
2614+
; RV64IXTHEADBB-LABEL: imm64_same_lo_hi_negative:
2615+
; RV64IXTHEADBB: # %bb.0:
2616+
; RV64IXTHEADBB-NEXT: lui a0, 983297
2617+
; RV64IXTHEADBB-NEXT: slli a0, a0, 4
2618+
; RV64IXTHEADBB-NEXT: addi a0, a0, 257
2619+
; RV64IXTHEADBB-NEXT: slli a0, a0, 16
2620+
; RV64IXTHEADBB-NEXT: addi a0, a0, 257
2621+
; RV64IXTHEADBB-NEXT: slli a0, a0, 15
2622+
; RV64IXTHEADBB-NEXT: addi a0, a0, 128
2623+
; RV64IXTHEADBB-NEXT: ret
2624+
ret i64 9259542123273814144 ; 0x8080808080808080
2625+
}
2626+
2627+
define i64 @imm64_0x8000080000000() {
2628+
; RV64I-LABEL: imm64_0x8000080000000:
2629+
; RV64I: # %bb.0:
2630+
; RV64I-NEXT: lui a0, 256
2631+
; RV64I-NEXT: addiw a0, a0, 1
2632+
; RV64I-NEXT: slli a0, a0, 31
2633+
; RV64I-NEXT: ret
2634+
;
2635+
; RV64IZBA-LABEL: imm64_0x8000080000000:
2636+
; RV64IZBA: # %bb.0:
2637+
; RV64IZBA-NEXT: lui a0, 256
2638+
; RV64IZBA-NEXT: addiw a0, a0, 1
2639+
; RV64IZBA-NEXT: slli a0, a0, 31
2640+
; RV64IZBA-NEXT: ret
2641+
;
2642+
; RV64IZBB-LABEL: imm64_0x8000080000000:
2643+
; RV64IZBB: # %bb.0:
2644+
; RV64IZBB-NEXT: lui a0, 256
2645+
; RV64IZBB-NEXT: addiw a0, a0, 1
2646+
; RV64IZBB-NEXT: slli a0, a0, 31
2647+
; RV64IZBB-NEXT: ret
2648+
;
2649+
; RV64IZBS-LABEL: imm64_0x8000080000000:
2650+
; RV64IZBS: # %bb.0:
2651+
; RV64IZBS-NEXT: lui a0, 256
2652+
; RV64IZBS-NEXT: addiw a0, a0, 1
2653+
; RV64IZBS-NEXT: slli a0, a0, 31
2654+
; RV64IZBS-NEXT: ret
2655+
;
2656+
; RV64IXTHEADBB-LABEL: imm64_0x8000080000000:
2657+
; RV64IXTHEADBB: # %bb.0:
2658+
; RV64IXTHEADBB-NEXT: lui a0, 256
2659+
; RV64IXTHEADBB-NEXT: addiw a0, a0, 1
2660+
; RV64IXTHEADBB-NEXT: slli a0, a0, 31
2661+
; RV64IXTHEADBB-NEXT: ret
2662+
ret i64 2251801961168896 ; 0x8000080000000
2663+
}
2664+
2665+
define i64 @imm64_0x10000100000000() {
2666+
; RV64I-LABEL: imm64_0x10000100000000:
2667+
; RV64I: # %bb.0:
2668+
; RV64I-NEXT: lui a0, 256
2669+
; RV64I-NEXT: addi a0, a0, 1
2670+
; RV64I-NEXT: slli a0, a0, 32
2671+
; RV64I-NEXT: ret
2672+
;
2673+
; RV64IZBA-LABEL: imm64_0x10000100000000:
2674+
; RV64IZBA: # %bb.0:
2675+
; RV64IZBA-NEXT: lui a0, 256
2676+
; RV64IZBA-NEXT: addi a0, a0, 1
2677+
; RV64IZBA-NEXT: slli a0, a0, 32
2678+
; RV64IZBA-NEXT: ret
2679+
;
2680+
; RV64IZBB-LABEL: imm64_0x10000100000000:
2681+
; RV64IZBB: # %bb.0:
2682+
; RV64IZBB-NEXT: lui a0, 256
2683+
; RV64IZBB-NEXT: addi a0, a0, 1
2684+
; RV64IZBB-NEXT: slli a0, a0, 32
2685+
; RV64IZBB-NEXT: ret
2686+
;
2687+
; RV64IZBS-LABEL: imm64_0x10000100000000:
2688+
; RV64IZBS: # %bb.0:
2689+
; RV64IZBS-NEXT: lui a0, 256
2690+
; RV64IZBS-NEXT: addi a0, a0, 1
2691+
; RV64IZBS-NEXT: slli a0, a0, 32
2692+
; RV64IZBS-NEXT: ret
2693+
;
2694+
; RV64IXTHEADBB-LABEL: imm64_0x10000100000000:
2695+
; RV64IXTHEADBB: # %bb.0:
2696+
; RV64IXTHEADBB-NEXT: lui a0, 256
2697+
; RV64IXTHEADBB-NEXT: addi a0, a0, 1
2698+
; RV64IXTHEADBB-NEXT: slli a0, a0, 32
2699+
; RV64IXTHEADBB-NEXT: ret
2700+
ret i64 4503603922337792 ; 0x10000100000000
2701+
}

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