[SLP][NFC]Add a test with potential non-power-of2 (but whole reg) vectorized stores

Author: alexey-bataev

llvm/test/Transforms/SLPVectorizer/X86/long-full-reg-stores.ll

@@ -0,0 +1,66 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
+; RUN: opt -S --passes=slp-vectorizer -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
+
+define void @test(ptr noalias %0, ptr noalias %1) {
+; CHECK-LABEL: define void @test(
+; CHECK-SAME: ptr noalias [[TMP0:%.*]], ptr noalias [[TMP1:%.*]]) {
+; CHECK-NEXT:    [[TMP3:%.*]] = getelementptr i8, ptr [[TMP1]], i64 24
+; CHECK-NEXT:    [[TMP4:%.*]] = getelementptr i8, ptr [[TMP1]], i64 48
+; CHECK-NEXT:    [[TMP5:%.*]] = getelementptr i8, ptr [[TMP1]], i64 8
+; CHECK-NEXT:    [[TMP6:%.*]] = getelementptr i8, ptr [[TMP1]], i64 16
+; CHECK-NEXT:    [[TMP7:%.*]] = getelementptr i8, ptr [[TMP0]], i64 24
+; CHECK-NEXT:    [[TMP8:%.*]] = load double, ptr [[TMP7]], align 8
+; CHECK-NEXT:    store double [[TMP8]], ptr [[TMP5]], align 8
+; CHECK-NEXT:    [[TMP9:%.*]] = getelementptr i8, ptr [[TMP0]], i64 48
+; CHECK-NEXT:    [[TMP10:%.*]] = load double, ptr [[TMP9]], align 16
+; CHECK-NEXT:    store double [[TMP10]], ptr [[TMP6]], align 16
+; CHECK-NEXT:    [[TMP11:%.*]] = getelementptr i8, ptr [[TMP0]], i64 8
+; CHECK-NEXT:    [[TMP12:%.*]] = load double, ptr [[TMP11]], align 8
+; CHECK-NEXT:    store double [[TMP12]], ptr [[TMP3]], align 8
+; CHECK-NEXT:    [[TMP13:%.*]] = getelementptr i8, ptr [[TMP0]], i64 32
+; CHECK-NEXT:    [[TMP14:%.*]] = load double, ptr [[TMP13]], align 16
+; CHECK-NEXT:    [[TMP15:%.*]] = getelementptr i8, ptr [[TMP1]], i64 32
+; CHECK-NEXT:    store double [[TMP14]], ptr [[TMP15]], align 16
+; CHECK-NEXT:    [[TMP16:%.*]] = getelementptr i8, ptr [[TMP0]], i64 56
+; CHECK-NEXT:    [[TMP17:%.*]] = load double, ptr [[TMP16]], align 8
+; CHECK-NEXT:    [[TMP18:%.*]] = getelementptr i8, ptr [[TMP1]], i64 40
+; CHECK-NEXT:    store double [[TMP17]], ptr [[TMP18]], align 8
+; CHECK-NEXT:    [[TMP19:%.*]] = getelementptr i8, ptr [[TMP0]], i64 16
+; CHECK-NEXT:    [[TMP20:%.*]] = load double, ptr [[TMP19]], align 16
+; CHECK-NEXT:    store double [[TMP20]], ptr [[TMP4]], align 16
+; CHECK-NEXT:    [[TMP21:%.*]] = getelementptr i8, ptr [[TMP0]], i64 40
+; CHECK-NEXT:    [[TMP22:%.*]] = load double, ptr [[TMP21]], align 8
+; CHECK-NEXT:    [[TMP23:%.*]] = getelementptr i8, ptr [[TMP1]], i64 56
+; CHECK-NEXT:    store double [[TMP22]], ptr [[TMP23]], align 8
+; CHECK-NEXT:    ret void
+;
+  %3 = getelementptr i8, ptr %1, i64 24
+  %4 = getelementptr i8, ptr %1, i64 48
+  %5 = getelementptr i8, ptr %1, i64 8
+  %6 = getelementptr i8, ptr %1, i64 16
+  %8 = getelementptr i8, ptr %0, i64 24
+  %9 = load double, ptr %8, align 8
+  store double %9, ptr %5, align 8
+  %10 = getelementptr i8, ptr %0, i64 48
+  %11 = load double, ptr %10, align 16
+  store double %11, ptr %6, align 16
+  %12 = getelementptr i8, ptr %0, i64 8
+  %13 = load double, ptr %12, align 8
+  store double %13, ptr %3, align 8
+  %14 = getelementptr i8, ptr %0, i64 32
+  %15 = load double, ptr %14, align 16
+  %16 = getelementptr i8, ptr %1, i64 32
+  store double %15, ptr %16, align 16
+  %17 = getelementptr i8, ptr %0, i64 56
+  %18 = load double, ptr %17, align 8
+  %19 = getelementptr i8, ptr %1, i64 40
+  store double %18, ptr %19, align 8
+  %20 = getelementptr i8, ptr %0, i64 16
+  %21 = load double, ptr %20, align 16
+  store double %21, ptr %4, align 16
+  %22 = getelementptr i8, ptr %0, i64 40
+  %23 = load double, ptr %22, align 8
+  %24 = getelementptr i8, ptr %1, i64 56
+  store double %23, ptr %24, align 8
+  ret void
+}