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[LV] Consider whether vscale is a known power of two for iteration check (#144963)
Going mostly by the comment here - but it says "vscale is not necessarily a power-of-2". Both in tree targets have vscale as a power of two, and we have an existing TTI hook for that.
1 parent f159774 commit c103bbc

20 files changed

+178
-410
lines changed

‎llvm/lib/Transforms/Vectorize/LoopVectorize.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2429,7 +2429,7 @@ Value *InnerLoopVectorizer::createIterationCountCheck(ElementCount VF,
24292429
// check is known to be true, or known to be false.
24302430
CheckMinIters = Builder.CreateICmp(P, Count, Step, "min.iters.check");
24312431
} // else step known to be < trip count, use CheckMinIters preset to false.
2432-
} else if (VF.isScalable() &&
2432+
} else if (VF.isScalable() && !TTI->isVScaleKnownToBeAPowerOfTwo() &&
24332433
!isIndvarOverflowCheckKnownFalse(Cost, VF, UF) &&
24342434
Style != TailFoldingStyle::DataAndControlFlowWithoutRuntimeCheck) {
24352435
// vscale is not necessarily a power-of-2, which means we cannot guarantee

‎llvm/test/Transforms/LoopVectorize/AArch64/tail-folding-styles.ll

Lines changed: 3 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -54,11 +54,7 @@ define void @simple_memset_tailfold(i32 %val, ptr %ptr, i64 %n) "target-features
5454
; DATA-LABEL: @simple_memset_tailfold(
5555
; DATA-NEXT: entry:
5656
; DATA-NEXT: [[UMAX:%.*]] = call i64 @llvm.umax.i64(i64 [[N:%.*]], i64 1)
57-
; DATA-NEXT: [[TMP0:%.*]] = sub i64 -1, [[UMAX]]
58-
; DATA-NEXT: [[TMP1:%.*]] = call i64 @llvm.vscale.i64()
59-
; DATA-NEXT: [[TMP2:%.*]] = mul nuw i64 [[TMP1]], 4
60-
; DATA-NEXT: [[TMP3:%.*]] = icmp ult i64 [[TMP0]], [[TMP2]]
61-
; DATA-NEXT: br i1 [[TMP3]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
57+
; DATA-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
6258
; DATA: vector.ph:
6359
; DATA-NEXT: [[TMP4:%.*]] = call i64 @llvm.vscale.i64()
6460
; DATA-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP4]], 4
@@ -98,11 +94,7 @@ define void @simple_memset_tailfold(i32 %val, ptr %ptr, i64 %n) "target-features
9894
; DATA_NO_LANEMASK-LABEL: @simple_memset_tailfold(
9995
; DATA_NO_LANEMASK-NEXT: entry:
10096
; DATA_NO_LANEMASK-NEXT: [[UMAX:%.*]] = call i64 @llvm.umax.i64(i64 [[N:%.*]], i64 1)
101-
; DATA_NO_LANEMASK-NEXT: [[TMP0:%.*]] = sub i64 -1, [[UMAX]]
102-
; DATA_NO_LANEMASK-NEXT: [[TMP1:%.*]] = call i64 @llvm.vscale.i64()
103-
; DATA_NO_LANEMASK-NEXT: [[TMP2:%.*]] = mul nuw i64 [[TMP1]], 4
104-
; DATA_NO_LANEMASK-NEXT: [[TMP3:%.*]] = icmp ult i64 [[TMP0]], [[TMP2]]
105-
; DATA_NO_LANEMASK-NEXT: br i1 [[TMP3]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
97+
; DATA_NO_LANEMASK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
10698
; DATA_NO_LANEMASK: vector.ph:
10799
; DATA_NO_LANEMASK-NEXT: [[TMP4:%.*]] = call i64 @llvm.vscale.i64()
108100
; DATA_NO_LANEMASK-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP4]], 4
@@ -150,11 +142,7 @@ define void @simple_memset_tailfold(i32 %val, ptr %ptr, i64 %n) "target-features
150142
; DATA_AND_CONTROL-LABEL: @simple_memset_tailfold(
151143
; DATA_AND_CONTROL-NEXT: entry:
152144
; DATA_AND_CONTROL-NEXT: [[UMAX:%.*]] = call i64 @llvm.umax.i64(i64 [[N:%.*]], i64 1)
153-
; DATA_AND_CONTROL-NEXT: [[TMP0:%.*]] = sub i64 -1, [[UMAX]]
154-
; DATA_AND_CONTROL-NEXT: [[TMP1:%.*]] = call i64 @llvm.vscale.i64()
155-
; DATA_AND_CONTROL-NEXT: [[TMP2:%.*]] = mul nuw i64 [[TMP1]], 4
156-
; DATA_AND_CONTROL-NEXT: [[TMP3:%.*]] = icmp ult i64 [[TMP0]], [[TMP2]]
157-
; DATA_AND_CONTROL-NEXT: br i1 [[TMP3]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
145+
; DATA_AND_CONTROL-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
158146
; DATA_AND_CONTROL: vector.ph:
159147
; DATA_AND_CONTROL-NEXT: [[TMP4:%.*]] = call i64 @llvm.vscale.i64()
160148
; DATA_AND_CONTROL-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP4]], 4

‎llvm/test/Transforms/LoopVectorize/RISCV/inloop-reduction.ll

Lines changed: 4 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -344,16 +344,12 @@ define i32 @smin(ptr %a, i64 %n, i32 %start) {
344344
;
345345
; IF-EVL-OUTLOOP-LABEL: @smin(
346346
; IF-EVL-OUTLOOP-NEXT: entry:
347-
; IF-EVL-OUTLOOP-NEXT: [[TMP0:%.*]] = sub i64 -1, [[N:%.*]]
348-
; IF-EVL-OUTLOOP-NEXT: [[TMP1:%.*]] = call i64 @llvm.vscale.i64()
349-
; IF-EVL-OUTLOOP-NEXT: [[TMP2:%.*]] = mul nuw i64 [[TMP1]], 4
350-
; IF-EVL-OUTLOOP-NEXT: [[TMP3:%.*]] = icmp ult i64 [[TMP0]], [[TMP2]]
351-
; IF-EVL-OUTLOOP-NEXT: br i1 [[TMP3]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
347+
; IF-EVL-OUTLOOP-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
352348
; IF-EVL-OUTLOOP: vector.ph:
353349
; IF-EVL-OUTLOOP-NEXT: [[TMP4:%.*]] = call i64 @llvm.vscale.i64()
354350
; IF-EVL-OUTLOOP-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP4]], 4
355351
; IF-EVL-OUTLOOP-NEXT: [[TMP6:%.*]] = sub i64 [[TMP5]], 1
356-
; IF-EVL-OUTLOOP-NEXT: [[N_RND_UP:%.*]] = add i64 [[N]], [[TMP6]]
352+
; IF-EVL-OUTLOOP-NEXT: [[N_RND_UP:%.*]] = add i64 [[N:%.*]], [[TMP6]]
357353
; IF-EVL-OUTLOOP-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N_RND_UP]], [[TMP5]]
358354
; IF-EVL-OUTLOOP-NEXT: [[N_VEC:%.*]] = sub i64 [[N_RND_UP]], [[N_MOD_VF]]
359355
; IF-EVL-OUTLOOP-NEXT: [[TMP7:%.*]] = call i64 @llvm.vscale.i64()
@@ -401,16 +397,12 @@ define i32 @smin(ptr %a, i64 %n, i32 %start) {
401397
;
402398
; IF-EVL-INLOOP-LABEL: @smin(
403399
; IF-EVL-INLOOP-NEXT: entry:
404-
; IF-EVL-INLOOP-NEXT: [[TMP0:%.*]] = sub i64 -1, [[N:%.*]]
405-
; IF-EVL-INLOOP-NEXT: [[TMP1:%.*]] = call i64 @llvm.vscale.i64()
406-
; IF-EVL-INLOOP-NEXT: [[TMP2:%.*]] = mul nuw i64 [[TMP1]], 4
407-
; IF-EVL-INLOOP-NEXT: [[TMP3:%.*]] = icmp ult i64 [[TMP0]], [[TMP2]]
408-
; IF-EVL-INLOOP-NEXT: br i1 [[TMP3]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
400+
; IF-EVL-INLOOP-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
409401
; IF-EVL-INLOOP: vector.ph:
410402
; IF-EVL-INLOOP-NEXT: [[TMP4:%.*]] = call i64 @llvm.vscale.i64()
411403
; IF-EVL-INLOOP-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP4]], 4
412404
; IF-EVL-INLOOP-NEXT: [[TMP6:%.*]] = sub i64 [[TMP5]], 1
413-
; IF-EVL-INLOOP-NEXT: [[N_RND_UP:%.*]] = add i64 [[N]], [[TMP6]]
405+
; IF-EVL-INLOOP-NEXT: [[N_RND_UP:%.*]] = add i64 [[N:%.*]], [[TMP6]]
414406
; IF-EVL-INLOOP-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N_RND_UP]], [[TMP5]]
415407
; IF-EVL-INLOOP-NEXT: [[N_VEC:%.*]] = sub i64 [[N_RND_UP]], [[N_MOD_VF]]
416408
; IF-EVL-INLOOP-NEXT: [[TMP7:%.*]] = call i64 @llvm.vscale.i64()

‎llvm/test/Transforms/LoopVectorize/RISCV/type-info-cache-evl-crash.ll

Lines changed: 1 addition & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -10,11 +10,7 @@ define void @type_info_cache_clobber(ptr %dstv, ptr %src, i64 %wide.trip.count)
1010
; CHECK-SAME: ptr [[DSTV:%.*]], ptr [[SRC:%.*]], i64 [[WIDE_TRIP_COUNT:%.*]]) #[[ATTR0:[0-9]+]] {
1111
; CHECK-NEXT: [[ENTRY:.*]]:
1212
; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[WIDE_TRIP_COUNT]], 1
13-
; CHECK-NEXT: [[TMP1:%.*]] = sub i64 -1, [[TMP0]]
14-
; CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.vscale.i64()
15-
; CHECK-NEXT: [[TMP3:%.*]] = mul nuw i64 [[TMP2]], 8
16-
; CHECK-NEXT: [[TMP4:%.*]] = icmp ult i64 [[TMP1]], [[TMP3]]
17-
; CHECK-NEXT: br i1 [[TMP4]], label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]]
13+
; CHECK-NEXT: br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]]
1814
; CHECK: [[VECTOR_MEMCHECK]]:
1915
; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[DSTV]], i64 1
2016
; CHECK-NEXT: [[TMP5:%.*]] = add i64 [[WIDE_TRIP_COUNT]], 1

‎llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-call-intrinsics.ll

Lines changed: 9 additions & 52 deletions
Original file line numberDiff line numberDiff line change
@@ -16,12 +16,7 @@ define void @vp_smax(ptr %a, ptr %b, ptr %c, i64 %N) {
1616
; IF-EVL-NEXT: [[C3:%.*]] = ptrtoint ptr [[C]] to i64
1717
; IF-EVL-NEXT: [[B2:%.*]] = ptrtoint ptr [[B]] to i64
1818
; IF-EVL-NEXT: [[A1:%.*]] = ptrtoint ptr [[A]] to i64
19-
; IF-EVL-NEXT: [[TMP0:%.*]] = sub i64 -1, [[N]]
20-
; IF-EVL-NEXT: [[TMP1:%.*]] = call i64 @llvm.vscale.i64()
21-
; IF-EVL-NEXT: [[TMP2:%.*]] = mul nuw i64 [[TMP1]], 4
22-
; IF-EVL-NEXT: [[TMP3:%.*]] = call i64 @llvm.umax.i64(i64 13, i64 [[TMP2]])
23-
; IF-EVL-NEXT: [[TMP22:%.*]] = icmp ult i64 [[TMP0]], [[TMP3]]
24-
; IF-EVL-NEXT: br i1 [[TMP22]], label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]]
19+
; IF-EVL-NEXT: br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]]
2520
; IF-EVL: [[VECTOR_MEMCHECK]]:
2621
; IF-EVL-NEXT: [[TMP4:%.*]] = call i64 @llvm.vscale.i64()
2722
; IF-EVL-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP4]], 4
@@ -130,12 +125,7 @@ define void @vp_smin(ptr %a, ptr %b, ptr %c, i64 %N) {
130125
; IF-EVL-NEXT: [[C3:%.*]] = ptrtoint ptr [[C]] to i64
131126
; IF-EVL-NEXT: [[B2:%.*]] = ptrtoint ptr [[B]] to i64
132127
; IF-EVL-NEXT: [[A1:%.*]] = ptrtoint ptr [[A]] to i64
133-
; IF-EVL-NEXT: [[TMP0:%.*]] = sub i64 -1, [[N]]
134-
; IF-EVL-NEXT: [[TMP1:%.*]] = call i64 @llvm.vscale.i64()
135-
; IF-EVL-NEXT: [[TMP2:%.*]] = mul nuw i64 [[TMP1]], 4
136-
; IF-EVL-NEXT: [[TMP3:%.*]] = call i64 @llvm.umax.i64(i64 13, i64 [[TMP2]])
137-
; IF-EVL-NEXT: [[TMP22:%.*]] = icmp ult i64 [[TMP0]], [[TMP3]]
138-
; IF-EVL-NEXT: br i1 [[TMP22]], label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]]
128+
; IF-EVL-NEXT: br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]]
139129
; IF-EVL: [[VECTOR_MEMCHECK]]:
140130
; IF-EVL-NEXT: [[TMP4:%.*]] = call i64 @llvm.vscale.i64()
141131
; IF-EVL-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP4]], 4
@@ -244,12 +234,7 @@ define void @vp_umax(ptr %a, ptr %b, ptr %c, i64 %N) {
244234
; IF-EVL-NEXT: [[C3:%.*]] = ptrtoint ptr [[C]] to i64
245235
; IF-EVL-NEXT: [[B2:%.*]] = ptrtoint ptr [[B]] to i64
246236
; IF-EVL-NEXT: [[A1:%.*]] = ptrtoint ptr [[A]] to i64
247-
; IF-EVL-NEXT: [[TMP0:%.*]] = sub i64 -1, [[N]]
248-
; IF-EVL-NEXT: [[TMP1:%.*]] = call i64 @llvm.vscale.i64()
249-
; IF-EVL-NEXT: [[TMP2:%.*]] = mul nuw i64 [[TMP1]], 4
250-
; IF-EVL-NEXT: [[TMP3:%.*]] = call i64 @llvm.umax.i64(i64 13, i64 [[TMP2]])
251-
; IF-EVL-NEXT: [[TMP22:%.*]] = icmp ult i64 [[TMP0]], [[TMP3]]
252-
; IF-EVL-NEXT: br i1 [[TMP22]], label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]]
237+
; IF-EVL-NEXT: br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]]
253238
; IF-EVL: [[VECTOR_MEMCHECK]]:
254239
; IF-EVL-NEXT: [[TMP4:%.*]] = call i64 @llvm.vscale.i64()
255240
; IF-EVL-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP4]], 4
@@ -358,12 +343,7 @@ define void @vp_umin(ptr %a, ptr %b, ptr %c, i64 %N) {
358343
; IF-EVL-NEXT: [[C3:%.*]] = ptrtoint ptr [[C]] to i64
359344
; IF-EVL-NEXT: [[B2:%.*]] = ptrtoint ptr [[B]] to i64
360345
; IF-EVL-NEXT: [[A1:%.*]] = ptrtoint ptr [[A]] to i64
361-
; IF-EVL-NEXT: [[TMP0:%.*]] = sub i64 -1, [[N]]
362-
; IF-EVL-NEXT: [[TMP1:%.*]] = call i64 @llvm.vscale.i64()
363-
; IF-EVL-NEXT: [[TMP2:%.*]] = mul nuw i64 [[TMP1]], 4
364-
; IF-EVL-NEXT: [[TMP3:%.*]] = call i64 @llvm.umax.i64(i64 13, i64 [[TMP2]])
365-
; IF-EVL-NEXT: [[TMP22:%.*]] = icmp ult i64 [[TMP0]], [[TMP3]]
366-
; IF-EVL-NEXT: br i1 [[TMP22]], label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]]
346+
; IF-EVL-NEXT: br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]]
367347
; IF-EVL: [[VECTOR_MEMCHECK]]:
368348
; IF-EVL-NEXT: [[TMP4:%.*]] = call i64 @llvm.vscale.i64()
369349
; IF-EVL-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP4]], 4
@@ -472,11 +452,7 @@ define void @vp_ctlz(ptr %a, ptr %b, i64 %N) {
472452
; IF-EVL-NEXT: [[ENTRY:.*]]:
473453
; IF-EVL-NEXT: [[B2:%.*]] = ptrtoint ptr [[B]] to i64
474454
; IF-EVL-NEXT: [[A1:%.*]] = ptrtoint ptr [[A]] to i64
475-
; IF-EVL-NEXT: [[TMP0:%.*]] = sub i64 -1, [[N]]
476-
; IF-EVL-NEXT: [[TMP1:%.*]] = call i64 @llvm.vscale.i64()
477-
; IF-EVL-NEXT: [[TMP2:%.*]] = mul nuw i64 [[TMP1]], 4
478-
; IF-EVL-NEXT: [[TMP3:%.*]] = icmp ult i64 [[TMP0]], [[TMP2]]
479-
; IF-EVL-NEXT: br i1 [[TMP3]], label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]]
455+
; IF-EVL-NEXT: br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]]
480456
; IF-EVL: [[VECTOR_MEMCHECK]]:
481457
; IF-EVL-NEXT: [[TMP4:%.*]] = call i64 @llvm.vscale.i64()
482458
; IF-EVL-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP4]], 4
@@ -571,11 +547,7 @@ define void @vp_cttz(ptr %a, ptr %b, i64 %N) {
571547
; IF-EVL-NEXT: [[ENTRY:.*]]:
572548
; IF-EVL-NEXT: [[B2:%.*]] = ptrtoint ptr [[B]] to i64
573549
; IF-EVL-NEXT: [[A1:%.*]] = ptrtoint ptr [[A]] to i64
574-
; IF-EVL-NEXT: [[TMP0:%.*]] = sub i64 -1, [[N]]
575-
; IF-EVL-NEXT: [[TMP1:%.*]] = call i64 @llvm.vscale.i64()
576-
; IF-EVL-NEXT: [[TMP2:%.*]] = mul nuw i64 [[TMP1]], 4
577-
; IF-EVL-NEXT: [[TMP3:%.*]] = icmp ult i64 [[TMP0]], [[TMP2]]
578-
; IF-EVL-NEXT: br i1 [[TMP3]], label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]]
550+
; IF-EVL-NEXT: br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]]
579551
; IF-EVL: [[VECTOR_MEMCHECK]]:
580552
; IF-EVL-NEXT: [[TMP4:%.*]] = call i64 @llvm.vscale.i64()
581553
; IF-EVL-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP4]], 4
@@ -670,12 +642,7 @@ define void @vp_lrint(ptr %a, ptr %b, i64 %N) {
670642
; IF-EVL-NEXT: [[ENTRY:.*]]:
671643
; IF-EVL-NEXT: [[B2:%.*]] = ptrtoint ptr [[B]] to i64
672644
; IF-EVL-NEXT: [[A1:%.*]] = ptrtoint ptr [[A]] to i64
673-
; IF-EVL-NEXT: [[TMP0:%.*]] = sub i64 -1, [[N]]
674-
; IF-EVL-NEXT: [[TMP1:%.*]] = call i64 @llvm.vscale.i64()
675-
; IF-EVL-NEXT: [[TMP2:%.*]] = mul nuw i64 [[TMP1]], 4
676-
; IF-EVL-NEXT: [[TMP3:%.*]] = call i64 @llvm.umax.i64(i64 9, i64 [[TMP2]])
677-
; IF-EVL-NEXT: [[TMP22:%.*]] = icmp ult i64 [[TMP0]], [[TMP3]]
678-
; IF-EVL-NEXT: br i1 [[TMP22]], label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]]
645+
; IF-EVL-NEXT: br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]]
679646
; IF-EVL: [[VECTOR_MEMCHECK]]:
680647
; IF-EVL-NEXT: [[TMP4:%.*]] = call i64 @llvm.vscale.i64()
681648
; IF-EVL-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP4]], 4
@@ -778,12 +745,7 @@ define void @vp_llrint(ptr %a, ptr %b, i64 %N) {
778745
; IF-EVL-NEXT: [[ENTRY:.*]]:
779746
; IF-EVL-NEXT: [[B2:%.*]] = ptrtoint ptr [[B]] to i64
780747
; IF-EVL-NEXT: [[A1:%.*]] = ptrtoint ptr [[A]] to i64
781-
; IF-EVL-NEXT: [[TMP0:%.*]] = sub i64 -1, [[N]]
782-
; IF-EVL-NEXT: [[TMP1:%.*]] = call i64 @llvm.vscale.i64()
783-
; IF-EVL-NEXT: [[TMP2:%.*]] = mul nuw i64 [[TMP1]], 4
784-
; IF-EVL-NEXT: [[TMP3:%.*]] = call i64 @llvm.umax.i64(i64 9, i64 [[TMP2]])
785-
; IF-EVL-NEXT: [[TMP22:%.*]] = icmp ult i64 [[TMP0]], [[TMP3]]
786-
; IF-EVL-NEXT: br i1 [[TMP22]], label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]]
748+
; IF-EVL-NEXT: br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]]
787749
; IF-EVL: [[VECTOR_MEMCHECK]]:
788750
; IF-EVL-NEXT: [[TMP4:%.*]] = call i64 @llvm.vscale.i64()
789751
; IF-EVL-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP4]], 4
@@ -886,12 +848,7 @@ define void @vp_abs(ptr %a, ptr %b, i64 %N) {
886848
; IF-EVL-NEXT: [[ENTRY:.*]]:
887849
; IF-EVL-NEXT: [[B2:%.*]] = ptrtoint ptr [[B]] to i64
888850
; IF-EVL-NEXT: [[A1:%.*]] = ptrtoint ptr [[A]] to i64
889-
; IF-EVL-NEXT: [[TMP0:%.*]] = sub i64 -1, [[N]]
890-
; IF-EVL-NEXT: [[TMP1:%.*]] = call i64 @llvm.vscale.i64()
891-
; IF-EVL-NEXT: [[TMP2:%.*]] = mul nuw i64 [[TMP1]], 4
892-
; IF-EVL-NEXT: [[TMP3:%.*]] = call i64 @llvm.umax.i64(i64 8, i64 [[TMP2]])
893-
; IF-EVL-NEXT: [[TMP19:%.*]] = icmp ult i64 [[TMP0]], [[TMP3]]
894-
; IF-EVL-NEXT: br i1 [[TMP19]], label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]]
851+
; IF-EVL-NEXT: br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]]
895852
; IF-EVL: [[VECTOR_MEMCHECK]]:
896853
; IF-EVL-NEXT: [[TMP4:%.*]] = call i64 @llvm.vscale.i64()
897854
; IF-EVL-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP4]], 4

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