|
| 1 | +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4 |
| 2 | +; RUN: opt < %s -S -passes=simplifycfg -mtriple=x86_64-- -mcpu=x86-64 | FileCheck %s --check-prefixes=SSE,SSE2 |
| 3 | +; RUN: opt < %s -S -passes=simplifycfg -mtriple=x86_64-- -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=SSE,SSE4 |
| 4 | +; RUN: opt < %s -S -passes=simplifycfg -mtriple=x86_64-- -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX,AVX2 |
| 5 | +; RUN: opt < %s -S -passes=simplifycfg -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX512 |
| 6 | + |
| 7 | +define zeroext i1 @cmp128(<2 x i64> %x, <2 x i64> %y) { |
| 8 | +; SSE-LABEL: define zeroext i1 @cmp128( |
| 9 | +; SSE-SAME: <2 x i64> [[X:%.*]], <2 x i64> [[Y:%.*]]) #[[ATTR0:[0-9]+]] { |
| 10 | +; SSE-NEXT: entry: |
| 11 | +; SSE-NEXT: [[CMP:%.*]] = icmp ne <2 x i64> [[X]], zeroinitializer |
| 12 | +; SSE-NEXT: [[TMP0:%.*]] = bitcast <2 x i1> [[CMP]] to i2 |
| 13 | +; SSE-NEXT: [[DOTNOT:%.*]] = icmp eq i2 [[TMP0]], 0 |
| 14 | +; SSE-NEXT: br i1 [[DOTNOT]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]] |
| 15 | +; SSE: land.rhs: |
| 16 | +; SSE-NEXT: [[CMP2:%.*]] = icmp ne <2 x i64> [[Y]], zeroinitializer |
| 17 | +; SSE-NEXT: [[TMP1:%.*]] = bitcast <2 x i1> [[CMP2]] to i2 |
| 18 | +; SSE-NEXT: [[DOTNOT9:%.*]] = icmp eq i2 [[TMP1]], 0 |
| 19 | +; SSE-NEXT: br label [[LAND_END]] |
| 20 | +; SSE: land.end: |
| 21 | +; SSE-NEXT: [[TMP2:%.*]] = phi i1 [ false, [[ENTRY:%.*]] ], [ [[DOTNOT9]], [[LAND_RHS]] ] |
| 22 | +; SSE-NEXT: ret i1 [[TMP2]] |
| 23 | +; |
| 24 | +; AVX2-LABEL: define zeroext i1 @cmp128( |
| 25 | +; AVX2-SAME: <2 x i64> [[X:%.*]], <2 x i64> [[Y:%.*]]) #[[ATTR0:[0-9]+]] { |
| 26 | +; AVX2-NEXT: entry: |
| 27 | +; AVX2-NEXT: [[CMP:%.*]] = icmp ne <2 x i64> [[X]], zeroinitializer |
| 28 | +; AVX2-NEXT: [[TMP0:%.*]] = bitcast <2 x i1> [[CMP]] to i2 |
| 29 | +; AVX2-NEXT: [[DOTNOT:%.*]] = icmp eq i2 [[TMP0]], 0 |
| 30 | +; AVX2-NEXT: br i1 [[DOTNOT]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]] |
| 31 | +; AVX2: land.rhs: |
| 32 | +; AVX2-NEXT: [[CMP2:%.*]] = icmp ne <2 x i64> [[Y]], zeroinitializer |
| 33 | +; AVX2-NEXT: [[TMP1:%.*]] = bitcast <2 x i1> [[CMP2]] to i2 |
| 34 | +; AVX2-NEXT: [[DOTNOT9:%.*]] = icmp eq i2 [[TMP1]], 0 |
| 35 | +; AVX2-NEXT: br label [[LAND_END]] |
| 36 | +; AVX2: land.end: |
| 37 | +; AVX2-NEXT: [[TMP2:%.*]] = phi i1 [ false, [[ENTRY:%.*]] ], [ [[DOTNOT9]], [[LAND_RHS]] ] |
| 38 | +; AVX2-NEXT: ret i1 [[TMP2]] |
| 39 | +; |
| 40 | +; AVX512-LABEL: define zeroext i1 @cmp128( |
| 41 | +; AVX512-SAME: <2 x i64> [[X:%.*]], <2 x i64> [[Y:%.*]]) #[[ATTR0:[0-9]+]] { |
| 42 | +; AVX512-NEXT: entry: |
| 43 | +; AVX512-NEXT: [[CMP:%.*]] = icmp ne <2 x i64> [[X]], zeroinitializer |
| 44 | +; AVX512-NEXT: [[TMP0:%.*]] = bitcast <2 x i1> [[CMP]] to i2 |
| 45 | +; AVX512-NEXT: [[DOTNOT:%.*]] = icmp eq i2 [[TMP0]], 0 |
| 46 | +; AVX512-NEXT: [[CMP2:%.*]] = icmp ne <2 x i64> [[Y]], zeroinitializer |
| 47 | +; AVX512-NEXT: [[TMP1:%.*]] = bitcast <2 x i1> [[CMP2]] to i2 |
| 48 | +; AVX512-NEXT: [[DOTNOT9:%.*]] = icmp eq i2 [[TMP1]], 0 |
| 49 | +; AVX512-NEXT: [[TMP2:%.*]] = select i1 [[DOTNOT]], i1 [[DOTNOT9]], i1 false |
| 50 | +; AVX512-NEXT: ret i1 [[TMP2]] |
| 51 | +; |
| 52 | +entry: |
| 53 | + %cmp = icmp ne <2 x i64> %x, zeroinitializer |
| 54 | + %0 = bitcast <2 x i1> %cmp to i2 |
| 55 | + %.not = icmp eq i2 %0, 0 |
| 56 | + br i1 %.not, label %land.rhs, label %land.end |
| 57 | + |
| 58 | +land.rhs: |
| 59 | + %cmp2 = icmp ne <2 x i64> %y, zeroinitializer |
| 60 | + %1 = bitcast <2 x i1> %cmp2 to i2 |
| 61 | + %.not9 = icmp eq i2 %1, 0 |
| 62 | + br label %land.end |
| 63 | + |
| 64 | +land.end: |
| 65 | + %2 = phi i1 [ false, %entry ], [ %.not9, %land.rhs ] |
| 66 | + ret i1 %2 |
| 67 | +} |
| 68 | + |
| 69 | +define zeroext i1 @cmp256(<4 x i64> %x, <4 x i64> %y) { |
| 70 | +; SSE-LABEL: define zeroext i1 @cmp256( |
| 71 | +; SSE-SAME: <4 x i64> [[X:%.*]], <4 x i64> [[Y:%.*]]) #[[ATTR0]] { |
| 72 | +; SSE-NEXT: entry: |
| 73 | +; SSE-NEXT: [[CMP:%.*]] = icmp ne <4 x i64> [[X]], zeroinitializer |
| 74 | +; SSE-NEXT: [[TMP0:%.*]] = bitcast <4 x i1> [[CMP]] to i4 |
| 75 | +; SSE-NEXT: [[DOTNOT:%.*]] = icmp eq i4 [[TMP0]], 0 |
| 76 | +; SSE-NEXT: br i1 [[DOTNOT]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]] |
| 77 | +; SSE: land.rhs: |
| 78 | +; SSE-NEXT: [[CMP2:%.*]] = icmp ne <4 x i64> [[Y]], zeroinitializer |
| 79 | +; SSE-NEXT: [[TMP1:%.*]] = bitcast <4 x i1> [[CMP2]] to i4 |
| 80 | +; SSE-NEXT: [[DOTNOT9:%.*]] = icmp eq i4 [[TMP1]], 0 |
| 81 | +; SSE-NEXT: br label [[LAND_END]] |
| 82 | +; SSE: land.end: |
| 83 | +; SSE-NEXT: [[TMP2:%.*]] = phi i1 [ false, [[ENTRY:%.*]] ], [ [[DOTNOT9]], [[LAND_RHS]] ] |
| 84 | +; SSE-NEXT: ret i1 [[TMP2]] |
| 85 | +; |
| 86 | +; AVX2-LABEL: define zeroext i1 @cmp256( |
| 87 | +; AVX2-SAME: <4 x i64> [[X:%.*]], <4 x i64> [[Y:%.*]]) #[[ATTR0]] { |
| 88 | +; AVX2-NEXT: entry: |
| 89 | +; AVX2-NEXT: [[CMP:%.*]] = icmp ne <4 x i64> [[X]], zeroinitializer |
| 90 | +; AVX2-NEXT: [[TMP0:%.*]] = bitcast <4 x i1> [[CMP]] to i4 |
| 91 | +; AVX2-NEXT: [[DOTNOT:%.*]] = icmp eq i4 [[TMP0]], 0 |
| 92 | +; AVX2-NEXT: br i1 [[DOTNOT]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]] |
| 93 | +; AVX2: land.rhs: |
| 94 | +; AVX2-NEXT: [[CMP2:%.*]] = icmp ne <4 x i64> [[Y]], zeroinitializer |
| 95 | +; AVX2-NEXT: [[TMP1:%.*]] = bitcast <4 x i1> [[CMP2]] to i4 |
| 96 | +; AVX2-NEXT: [[DOTNOT9:%.*]] = icmp eq i4 [[TMP1]], 0 |
| 97 | +; AVX2-NEXT: br label [[LAND_END]] |
| 98 | +; AVX2: land.end: |
| 99 | +; AVX2-NEXT: [[TMP2:%.*]] = phi i1 [ false, [[ENTRY:%.*]] ], [ [[DOTNOT9]], [[LAND_RHS]] ] |
| 100 | +; AVX2-NEXT: ret i1 [[TMP2]] |
| 101 | +; |
| 102 | +; AVX512-LABEL: define zeroext i1 @cmp256( |
| 103 | +; AVX512-SAME: <4 x i64> [[X:%.*]], <4 x i64> [[Y:%.*]]) #[[ATTR0]] { |
| 104 | +; AVX512-NEXT: entry: |
| 105 | +; AVX512-NEXT: [[CMP:%.*]] = icmp ne <4 x i64> [[X]], zeroinitializer |
| 106 | +; AVX512-NEXT: [[TMP0:%.*]] = bitcast <4 x i1> [[CMP]] to i4 |
| 107 | +; AVX512-NEXT: [[DOTNOT:%.*]] = icmp eq i4 [[TMP0]], 0 |
| 108 | +; AVX512-NEXT: [[CMP2:%.*]] = icmp ne <4 x i64> [[Y]], zeroinitializer |
| 109 | +; AVX512-NEXT: [[TMP1:%.*]] = bitcast <4 x i1> [[CMP2]] to i4 |
| 110 | +; AVX512-NEXT: [[DOTNOT9:%.*]] = icmp eq i4 [[TMP1]], 0 |
| 111 | +; AVX512-NEXT: [[TMP2:%.*]] = select i1 [[DOTNOT]], i1 [[DOTNOT9]], i1 false |
| 112 | +; AVX512-NEXT: ret i1 [[TMP2]] |
| 113 | +; |
| 114 | +entry: |
| 115 | + %cmp = icmp ne <4 x i64> %x, zeroinitializer |
| 116 | + %0 = bitcast <4 x i1> %cmp to i4 |
| 117 | + %.not = icmp eq i4 %0, 0 |
| 118 | + br i1 %.not, label %land.rhs, label %land.end |
| 119 | + |
| 120 | +land.rhs: |
| 121 | + %cmp2 = icmp ne <4 x i64> %y, zeroinitializer |
| 122 | + %1 = bitcast <4 x i1> %cmp2 to i4 |
| 123 | + %.not9 = icmp eq i4 %1, 0 |
| 124 | + br label %land.end |
| 125 | + |
| 126 | +land.end: |
| 127 | + %2 = phi i1 [ false, %entry ], [ %.not9, %land.rhs ] |
| 128 | + ret i1 %2 |
| 129 | +} |
| 130 | + |
| 131 | +define zeroext i1 @cmp512(<8 x i64> %x, <8 x i64> %y) { |
| 132 | +; SSE-LABEL: define zeroext i1 @cmp512( |
| 133 | +; SSE-SAME: <8 x i64> [[X:%.*]], <8 x i64> [[Y:%.*]]) #[[ATTR0]] { |
| 134 | +; SSE-NEXT: entry: |
| 135 | +; SSE-NEXT: [[CMP:%.*]] = icmp ne <8 x i64> [[X]], zeroinitializer |
| 136 | +; SSE-NEXT: [[TMP0:%.*]] = bitcast <8 x i1> [[CMP]] to i8 |
| 137 | +; SSE-NEXT: [[DOTNOT:%.*]] = icmp eq i8 [[TMP0]], 0 |
| 138 | +; SSE-NEXT: br i1 [[DOTNOT]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]] |
| 139 | +; SSE: land.rhs: |
| 140 | +; SSE-NEXT: [[CMP2:%.*]] = icmp ne <8 x i64> [[Y]], zeroinitializer |
| 141 | +; SSE-NEXT: [[TMP1:%.*]] = bitcast <8 x i1> [[CMP2]] to i8 |
| 142 | +; SSE-NEXT: [[DOTNOT9:%.*]] = icmp eq i8 [[TMP1]], 0 |
| 143 | +; SSE-NEXT: br label [[LAND_END]] |
| 144 | +; SSE: land.end: |
| 145 | +; SSE-NEXT: [[TMP2:%.*]] = phi i1 [ false, [[ENTRY:%.*]] ], [ [[DOTNOT9]], [[LAND_RHS]] ] |
| 146 | +; SSE-NEXT: ret i1 [[TMP2]] |
| 147 | +; |
| 148 | +; AVX2-LABEL: define zeroext i1 @cmp512( |
| 149 | +; AVX2-SAME: <8 x i64> [[X:%.*]], <8 x i64> [[Y:%.*]]) #[[ATTR0]] { |
| 150 | +; AVX2-NEXT: entry: |
| 151 | +; AVX2-NEXT: [[CMP:%.*]] = icmp ne <8 x i64> [[X]], zeroinitializer |
| 152 | +; AVX2-NEXT: [[TMP0:%.*]] = bitcast <8 x i1> [[CMP]] to i8 |
| 153 | +; AVX2-NEXT: [[DOTNOT:%.*]] = icmp eq i8 [[TMP0]], 0 |
| 154 | +; AVX2-NEXT: br i1 [[DOTNOT]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]] |
| 155 | +; AVX2: land.rhs: |
| 156 | +; AVX2-NEXT: [[CMP2:%.*]] = icmp ne <8 x i64> [[Y]], zeroinitializer |
| 157 | +; AVX2-NEXT: [[TMP1:%.*]] = bitcast <8 x i1> [[CMP2]] to i8 |
| 158 | +; AVX2-NEXT: [[DOTNOT9:%.*]] = icmp eq i8 [[TMP1]], 0 |
| 159 | +; AVX2-NEXT: br label [[LAND_END]] |
| 160 | +; AVX2: land.end: |
| 161 | +; AVX2-NEXT: [[TMP2:%.*]] = phi i1 [ false, [[ENTRY:%.*]] ], [ [[DOTNOT9]], [[LAND_RHS]] ] |
| 162 | +; AVX2-NEXT: ret i1 [[TMP2]] |
| 163 | +; |
| 164 | +; AVX512-LABEL: define zeroext i1 @cmp512( |
| 165 | +; AVX512-SAME: <8 x i64> [[X:%.*]], <8 x i64> [[Y:%.*]]) #[[ATTR0]] { |
| 166 | +; AVX512-NEXT: entry: |
| 167 | +; AVX512-NEXT: [[CMP:%.*]] = icmp ne <8 x i64> [[X]], zeroinitializer |
| 168 | +; AVX512-NEXT: [[TMP0:%.*]] = bitcast <8 x i1> [[CMP]] to i8 |
| 169 | +; AVX512-NEXT: [[DOTNOT:%.*]] = icmp eq i8 [[TMP0]], 0 |
| 170 | +; AVX512-NEXT: [[CMP2:%.*]] = icmp ne <8 x i64> [[Y]], zeroinitializer |
| 171 | +; AVX512-NEXT: [[TMP1:%.*]] = bitcast <8 x i1> [[CMP2]] to i8 |
| 172 | +; AVX512-NEXT: [[DOTNOT9:%.*]] = icmp eq i8 [[TMP1]], 0 |
| 173 | +; AVX512-NEXT: [[TMP2:%.*]] = select i1 [[DOTNOT]], i1 [[DOTNOT9]], i1 false |
| 174 | +; AVX512-NEXT: ret i1 [[TMP2]] |
| 175 | +; |
| 176 | +entry: |
| 177 | + %cmp = icmp ne <8 x i64> %x, zeroinitializer |
| 178 | + %0 = bitcast <8 x i1> %cmp to i8 |
| 179 | + %.not = icmp eq i8 %0, 0 |
| 180 | + br i1 %.not, label %land.rhs, label %land.end |
| 181 | + |
| 182 | +land.rhs: |
| 183 | + %cmp2 = icmp ne <8 x i64> %y, zeroinitializer |
| 184 | + %1 = bitcast <8 x i1> %cmp2 to i8 |
| 185 | + %.not9 = icmp eq i8 %1, 0 |
| 186 | + br label %land.end |
| 187 | + |
| 188 | +land.end: |
| 189 | + %2 = phi i1 [ false, %entry ], [ %.not9, %land.rhs ] |
| 190 | + ret i1 %2 |
| 191 | +} |
| 192 | +;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: |
| 193 | +; AVX: {{.*}} |
| 194 | +; SSE2: {{.*}} |
| 195 | +; SSE4: {{.*}} |
0 commit comments