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[X86] LowerSELECTWithCmpZero - add missing description of fold and cleanup zero/allones extension code. NFC.
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llvm/lib/Target/X86/X86ISelLowering.cpp

Lines changed: 8 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -24084,13 +24084,13 @@ static SDValue LowerSELECTWithCmpZero(SDValue CmpVal, SDValue LHS, SDValue RHS,
2408424084
if (!CmpVT.isScalarInteger() || !VT.isScalarInteger())
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return SDValue();
2408624086

24087+
// Convert OR/XOR 'identity' patterns (iff X is 0 or 1):
24088+
// select (X != 0), Y, (OR Y, Z) -> (OR Y, (AND (0 - X), Z))
24089+
// select (X != 0), Y, (XOR Y, Z) -> (XOR Y, (AND (0 - X), Z))
2408724090
if (!Subtarget.canUseCMOV() && X86CC == X86::COND_E &&
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CmpVal.getOpcode() == ISD::AND && isOneConstant(CmpVal.getOperand(1))) {
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SDValue Src1, Src2;
24090-
// true if RHS is XOR or OR operator and one of its operands
24091-
// is equal to LHS
24092-
// ( a , a op b) || ( b , a op b)
24093-
auto isOrXorPattern = [&]() {
24093+
auto isIdentityPattern = [&]() {
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if ((RHS.getOpcode() == ISD::XOR || RHS.getOpcode() == ISD::OR) &&
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(RHS.getOperand(0) == LHS || RHS.getOperand(1) == LHS)) {
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Src1 = RHS.getOperand(RHS.getOperand(0) == LHS ? 1 : 0);
@@ -24100,20 +24100,17 @@ static SDValue LowerSELECTWithCmpZero(SDValue CmpVal, SDValue LHS, SDValue RHS,
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return false;
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};
2410224102

24103-
if (isOrXorPattern()) {
24104-
SDValue Neg;
24105-
unsigned int CmpSz = CmpVT.getSizeInBits();
24103+
if (isIdentityPattern()) {
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// we need mask of all zeros or ones with same size of the other
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// operands.
24108-
if (CmpSz > VT.getSizeInBits())
24106+
SDValue Neg = CmpVal;
24107+
if (CmpVT.bitsGT(VT))
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Neg = DAG.getNode(ISD::TRUNCATE, DL, VT, CmpVal);
24110-
else if (CmpSz < VT.getSizeInBits())
24109+
else if (CmpVT.bitsLT(VT))
2411124110
Neg = DAG.getNode(
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ISD::AND, DL, VT,
2411324112
DAG.getNode(ISD::ANY_EXTEND, DL, VT, CmpVal.getOperand(0)),
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DAG.getConstant(1, DL, VT));
24115-
else
24116-
Neg = CmpVal;
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SDValue Mask = DAG.getNegative(Neg, DL, VT); // -(and (x, 0x1))
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SDValue And = DAG.getNode(ISD::AND, DL, VT, Mask, Src1); // Mask & z
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return DAG.getNode(RHS.getOpcode(), DL, VT, And, Src2); // And Op y

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