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fmayerfmayer
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Revert "[MSAN] handle assorted AVX permutations (#143462)"
This reverts commit d7e64d9.
1 parent 179d724 commit c21436f

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7 files changed

+652
-1164
lines changed

7 files changed

+652
-1164
lines changed

‎llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp

Lines changed: 3 additions & 79 deletions
Original file line numberDiff line numberDiff line change
@@ -4209,15 +4209,7 @@ struct MemorySanitizerVisitor : public InstVisitor<MemorySanitizerVisitor> {
42094209

42104210
// Instrument AVX permutation intrinsic.
42114211
// We apply the same permutation (argument index 1) to the shadow.
4212-
void handleAVXPermutation(IntrinsicInst &I) {
4213-
assert(I.arg_size() == 2);
4214-
assert(isa<FixedVectorType>(I.getArgOperand(0)->getType()));
4215-
assert(isa<FixedVectorType>(I.getArgOperand(1)->getType()));
4216-
[[maybe_unused]] auto ArgVectorSize =
4217-
cast<FixedVectorType>(I.getArgOperand(0)->getType())->getNumElements();
4218-
assert(cast<FixedVectorType>(I.getArgOperand(1)->getType())
4219-
->getNumElements() == ArgVectorSize);
4220-
assert(I.getType() == I.getArgOperand(0)->getType());
4212+
void handleAVXVpermilvar(IntrinsicInst &I) {
42214213
IRBuilder<> IRB(&I);
42224214
Value *Shadow = getShadow(&I, 0);
42234215
insertShadowCheck(I.getArgOperand(1), &I);
@@ -4231,38 +4223,6 @@ struct MemorySanitizerVisitor : public InstVisitor<MemorySanitizerVisitor> {
42314223
setShadow(&I, IRB.CreateBitCast(CI, getShadowTy(&I)));
42324224
setOriginForNaryOp(I);
42334225
}
4234-
// Instrument AVX permutation intrinsic.
4235-
// We apply the same permutation (argument index 1) to the shadows.
4236-
void handleAVXVpermil2var(IntrinsicInst &I) {
4237-
assert(I.arg_size() == 3);
4238-
assert(isa<FixedVectorType>(I.getArgOperand(0)->getType()));
4239-
assert(isa<FixedVectorType>(I.getArgOperand(1)->getType()));
4240-
assert(isa<FixedVectorType>(I.getArgOperand(2)->getType()));
4241-
[[maybe_unused]] auto ArgVectorSize =
4242-
cast<FixedVectorType>(I.getArgOperand(0)->getType())->getNumElements();
4243-
assert(cast<FixedVectorType>(I.getArgOperand(1)->getType())
4244-
->getNumElements() == ArgVectorSize);
4245-
assert(cast<FixedVectorType>(I.getArgOperand(2)->getType())
4246-
->getNumElements() == ArgVectorSize);
4247-
assert(I.getArgOperand(0)->getType() == I.getArgOperand(2)->getType());
4248-
assert(I.getType() == I.getArgOperand(0)->getType());
4249-
assert(I.getArgOperand(1)->getType()->isIntOrIntVectorTy());
4250-
IRBuilder<> IRB(&I);
4251-
Value *AShadow = getShadow(&I, 0);
4252-
Value *Idx = I.getArgOperand(1);
4253-
Value *BShadow = getShadow(&I, 2);
4254-
insertShadowCheck(Idx, &I);
4255-
4256-
// Shadows are integer-ish types but some intrinsics require a
4257-
// different (e.g., floating-point) type.
4258-
AShadow = IRB.CreateBitCast(AShadow, I.getArgOperand(0)->getType());
4259-
BShadow = IRB.CreateBitCast(BShadow, I.getArgOperand(2)->getType());
4260-
CallInst *CI = IRB.CreateIntrinsic(I.getType(), I.getIntrinsicID(),
4261-
{AShadow, Idx, BShadow});
4262-
4263-
setShadow(&I, IRB.CreateBitCast(CI, getShadowTy(&I)));
4264-
setOriginForNaryOp(I);
4265-
}
42664226

42674227
// Instrument BMI / BMI2 intrinsics.
42684228
// All of these intrinsics are Z = I(X, Y)
@@ -5208,52 +5168,16 @@ struct MemorySanitizerVisitor : public InstVisitor<MemorySanitizerVisitor> {
52085168
assert(Success);
52095169
break;
52105170
}
5211-
case Intrinsic::x86_avx2_permd:
5212-
case Intrinsic::x86_avx2_permps:
5213-
case Intrinsic::x86_ssse3_pshuf_b_128:
5214-
case Intrinsic::x86_avx2_pshuf_b:
5215-
case Intrinsic::x86_avx512_pshuf_b_512:
5216-
case Intrinsic::x86_avx512_permvar_df_256:
5217-
case Intrinsic::x86_avx512_permvar_df_512:
5218-
case Intrinsic::x86_avx512_permvar_di_256:
5219-
case Intrinsic::x86_avx512_permvar_di_512:
5220-
case Intrinsic::x86_avx512_permvar_hi_128:
5221-
case Intrinsic::x86_avx512_permvar_hi_256:
5222-
case Intrinsic::x86_avx512_permvar_hi_512:
5223-
case Intrinsic::x86_avx512_permvar_qi_128:
5224-
case Intrinsic::x86_avx512_permvar_qi_256:
5225-
case Intrinsic::x86_avx512_permvar_qi_512:
5226-
case Intrinsic::x86_avx512_permvar_sf_512:
5227-
case Intrinsic::x86_avx512_permvar_si_512:
5171+
52285172
case Intrinsic::x86_avx_vpermilvar_pd:
52295173
case Intrinsic::x86_avx_vpermilvar_pd_256:
52305174
case Intrinsic::x86_avx512_vpermilvar_pd_512:
52315175
case Intrinsic::x86_avx_vpermilvar_ps:
52325176
case Intrinsic::x86_avx_vpermilvar_ps_256:
52335177
case Intrinsic::x86_avx512_vpermilvar_ps_512: {
5234-
handleAVXPermutation(I);
5178+
handleAVXVpermilvar(I);
52355179
break;
52365180
}
5237-
case Intrinsic::x86_avx512_vpermi2var_d_128:
5238-
case Intrinsic::x86_avx512_vpermi2var_d_256:
5239-
case Intrinsic::x86_avx512_vpermi2var_d_512:
5240-
case Intrinsic::x86_avx512_vpermi2var_hi_128:
5241-
case Intrinsic::x86_avx512_vpermi2var_hi_256:
5242-
case Intrinsic::x86_avx512_vpermi2var_hi_512:
5243-
case Intrinsic::x86_avx512_vpermi2var_pd_128:
5244-
case Intrinsic::x86_avx512_vpermi2var_pd_256:
5245-
case Intrinsic::x86_avx512_vpermi2var_pd_512:
5246-
case Intrinsic::x86_avx512_vpermi2var_ps_128:
5247-
case Intrinsic::x86_avx512_vpermi2var_ps_256:
5248-
case Intrinsic::x86_avx512_vpermi2var_ps_512:
5249-
case Intrinsic::x86_avx512_vpermi2var_q_128:
5250-
case Intrinsic::x86_avx512_vpermi2var_q_256:
5251-
case Intrinsic::x86_avx512_vpermi2var_q_512:
5252-
case Intrinsic::x86_avx512_vpermi2var_qi_128:
5253-
case Intrinsic::x86_avx512_vpermi2var_qi_256:
5254-
case Intrinsic::x86_avx512_vpermi2var_qi_512:
5255-
handleAVXVpermil2var(I);
5256-
break;
52575181

52585182
case Intrinsic::x86_avx512fp16_mask_add_sh_round:
52595183
case Intrinsic::x86_avx512fp16_mask_sub_sh_round:

‎llvm/test/Instrumentation/MemorySanitizer/X86/avx2-intrinsics-x86.ll

Lines changed: 12 additions & 26 deletions
Original file line numberDiff line numberDiff line change
@@ -740,15 +740,8 @@ define <32 x i8> @test_x86_avx2_pshuf_b(<32 x i8> %a0, <32 x i8> %a1) #0 {
740740
; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i8>, ptr @__msan_param_tls, align 8
741741
; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i8>, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 32) to ptr), align 8
742742
; CHECK-NEXT: call void @llvm.donothing()
743-
; CHECK-NEXT: [[_MSPROP:%.*]] = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> [[TMP1]], <32 x i8> [[A1:%.*]])
744-
; CHECK-NEXT: [[TMP4:%.*]] = bitcast <32 x i8> [[TMP2]] to i256
745-
; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i256 [[TMP4]], 0
746-
; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP5:%.*]], label [[TMP6:%.*]], !prof [[PROF1]]
747-
; CHECK: 5:
748-
; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR6]]
749-
; CHECK-NEXT: unreachable
750-
; CHECK: 6:
751-
; CHECK-NEXT: [[RES:%.*]] = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> [[A0:%.*]], <32 x i8> [[A1]])
743+
; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i8> [[TMP1]], [[TMP2]]
744+
; CHECK-NEXT: [[RES:%.*]] = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> [[A0:%.*]], <32 x i8> [[A1:%.*]])
752745
; CHECK-NEXT: store <32 x i8> [[_MSPROP]], ptr @__msan_retval_tls, align 8
753746
; CHECK-NEXT: ret <32 x i8> [[RES]]
754747
;
@@ -976,15 +969,8 @@ define <8 x i32> @test_x86_avx2_permd(<8 x i32> %a0, <8 x i32> %a1) #0 {
976969
; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i32>, ptr @__msan_param_tls, align 8
977970
; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i32>, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 32) to ptr), align 8
978971
; CHECK-NEXT: call void @llvm.donothing()
979-
; CHECK-NEXT: [[_MSPROP:%.*]] = call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> [[TMP1]], <8 x i32> [[A1:%.*]])
980-
; CHECK-NEXT: [[TMP4:%.*]] = bitcast <8 x i32> [[TMP2]] to i256
981-
; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i256 [[TMP4]], 0
982-
; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP5:%.*]], label [[TMP6:%.*]], !prof [[PROF1]]
983-
; CHECK: 5:
984-
; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR6]]
985-
; CHECK-NEXT: unreachable
986-
; CHECK: 6:
987-
; CHECK-NEXT: [[RES:%.*]] = call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> [[A0:%.*]], <8 x i32> [[A1]])
972+
; CHECK-NEXT: [[_MSPROP:%.*]] = or <8 x i32> [[TMP1]], [[TMP2]]
973+
; CHECK-NEXT: [[RES:%.*]] = call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> [[A0:%.*]], <8 x i32> [[A1:%.*]])
988974
; CHECK-NEXT: store <8 x i32> [[_MSPROP]], ptr @__msan_retval_tls, align 8
989975
; CHECK-NEXT: ret <8 x i32> [[RES]]
990976
;
@@ -999,18 +985,18 @@ define <8 x float> @test_x86_avx2_permps(<8 x float> %a0, <8 x i32> %a1) #0 {
999985
; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i32>, ptr @__msan_param_tls, align 8
1000986
; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i32>, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 32) to ptr), align 8
1001987
; CHECK-NEXT: call void @llvm.donothing()
1002-
; CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i32> [[TMP1]] to <8 x float>
1003-
; CHECK-NEXT: [[TMP6:%.*]] = call <8 x float> @llvm.x86.avx2.permps(<8 x float> [[TMP3]], <8 x i32> [[A1:%.*]])
1004-
; CHECK-NEXT: [[TMP5:%.*]] = bitcast <8 x float> [[TMP6]] to <8 x i32>
988+
; CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i32> [[TMP1]] to i256
989+
; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i256 [[TMP3]], 0
1005990
; CHECK-NEXT: [[TMP4:%.*]] = bitcast <8 x i32> [[TMP2]] to i256
1006991
; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i256 [[TMP4]], 0
1007-
; CHECK-NEXT: br i1 [[_MSCMP1]], label [[TMP7:%.*]], label [[TMP8:%.*]], !prof [[PROF1]]
1008-
; CHECK: 7:
992+
; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP1]]
993+
; CHECK-NEXT: br i1 [[_MSOR]], label [[TMP5:%.*]], label [[TMP6:%.*]], !prof [[PROF1]]
994+
; CHECK: 5:
1009995
; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR6]]
1010996
; CHECK-NEXT: unreachable
1011-
; CHECK: 8:
1012-
; CHECK-NEXT: [[RES:%.*]] = call <8 x float> @llvm.x86.avx2.permps(<8 x float> [[A0:%.*]], <8 x i32> [[A1]])
1013-
; CHECK-NEXT: store <8 x i32> [[TMP5]], ptr @__msan_retval_tls, align 8
997+
; CHECK: 6:
998+
; CHECK-NEXT: [[RES:%.*]] = call <8 x float> @llvm.x86.avx2.permps(<8 x float> [[A0:%.*]], <8 x i32> [[A1:%.*]])
999+
; CHECK-NEXT: store <8 x i32> zeroinitializer, ptr @__msan_retval_tls, align 8
10141000
; CHECK-NEXT: ret <8 x float> [[RES]]
10151001
;
10161002
%res = call <8 x float> @llvm.x86.avx2.permps(<8 x float> %a0, <8 x i32> %a1) ; <<8 x float>> [#uses=1]

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