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[VectorCombine] Don't transform single shuffles in shuffleToIdentity
This will help in later patches where the checks for operands being instructions is removed, and might help not remove unnecessary poison lanes.
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+8
-4
lines changed

2 files changed

+8
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lines changed

llvm/lib/Transforms/Vectorize/VectorCombine.cpp

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@@ -1794,6 +1794,9 @@ bool VectorCombine::foldShuffleToIdentity(Instruction &I) {
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}
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}
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if (NumVisited <= 1)
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return false;
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// If we got this far, we know the shuffles are superfluous and can be
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// removed. Scan through again and generate the new tree of instructions.
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std::function<Value *(ArrayRef<InstLane>)> Generate =

llvm/test/Transforms/VectorCombine/X86/select-shuffle.ll

Lines changed: 5 additions & 4 deletions
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@@ -12,11 +12,12 @@ define <4 x double> @PR60649() {
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; CHECK: unreachable:
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; CHECK-NEXT: br label [[END]]
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; CHECK: end:
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; CHECK-NEXT: [[TMP0:%.*]] = phi <4 x double> [ zeroinitializer, [[ENTRY:%.*]] ], [ zeroinitializer, [[UNREACHABLE:%.*]] ]
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; CHECK-NEXT: [[T0:%.*]] = phi <4 x double> [ zeroinitializer, [[ENTRY:%.*]] ], [ zeroinitializer, [[UNREACHABLE:%.*]] ]
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; CHECK-NEXT: [[T1:%.*]] = phi <4 x double> [ zeroinitializer, [[ENTRY]] ], [ zeroinitializer, [[UNREACHABLE]] ]
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; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x double> [[TMP0]], <4 x double> [[TMP0]], <4 x i32> <i32 2, i32 3, i32 poison, i32 poison>
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; CHECK-NEXT: [[TMP2:%.*]] = fdiv <4 x double> [[TMP0]], <double 0.000000e+00, double 0.000000e+00, double undef, double undef>
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; CHECK-NEXT: [[TMP3:%.*]] = fmul <4 x double> [[TMP1]], <double 0.000000e+00, double 0.000000e+00, double undef, double undef>
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; CHECK-NEXT: [[TMP0:%.*]] = shufflevector <4 x double> [[T0]], <4 x double> [[T0]], <4 x i32> <i32 2, i32 3, i32 poison, i32 poison>
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; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x double> [[T0]], <4 x double> [[T0]], <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
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; CHECK-NEXT: [[TMP2:%.*]] = fdiv <4 x double> [[TMP1]], <double 0.000000e+00, double 0.000000e+00, double undef, double undef>
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; CHECK-NEXT: [[TMP3:%.*]] = fmul <4 x double> [[TMP0]], <double 0.000000e+00, double 0.000000e+00, double undef, double undef>
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; CHECK-NEXT: [[T5:%.*]] = shufflevector <4 x double> [[TMP2]], <4 x double> [[TMP3]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>
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; CHECK-NEXT: ret <4 x double> [[T5]]
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;

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