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[PHIElimination] Handle subranges in LiveInterval updates
Add handling for subrange updates in LiveInterval preservation. Differential Revision: https://reviews.llvm.org/D158144
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+81
-26
lines changed

5 files changed

+81
-26
lines changed

‎llvm/include/llvm/CodeGen/LiveIntervals.h

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -139,6 +139,10 @@ class VirtRegMap;
139139
return LI;
140140
}
141141

142+
LiveInterval &getOrCreateEmptyInterval(Register Reg) {
143+
return hasInterval(Reg) ? getInterval(Reg) : createEmptyInterval(Reg);
144+
}
145+
142146
/// Interval removal.
143147
void removeInterval(Register Reg) {
144148
delete VirtRegIntervals[Reg];

‎llvm/lib/CodeGen/LiveIntervals.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -862,7 +862,7 @@ float LiveIntervals::getSpillWeight(bool isDef, bool isUse,
862862

863863
LiveRange::Segment
864864
LiveIntervals::addSegmentToEndOfBlock(Register Reg, MachineInstr &startInst) {
865-
LiveInterval &Interval = createEmptyInterval(Reg);
865+
LiveInterval &Interval = getOrCreateEmptyInterval(Reg);
866866
VNInfo *VN = Interval.getNextValue(
867867
SlotIndex(getInstructionIndex(startInst).getRegSlot()),
868868
getVNInfoAllocator());

‎llvm/lib/CodeGen/MachineBasicBlock.cpp

Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1283,6 +1283,8 @@ MachineBasicBlock *MachineBasicBlock::SplitCriticalEdge(
12831283
assert(VNI &&
12841284
"PHI sources should be live out of their predecessors.");
12851285
LI.addSegment(LiveInterval::Segment(StartIndex, EndIndex, VNI));
1286+
for (auto &SR : LI.subranges())
1287+
SR.addSegment(LiveInterval::Segment(StartIndex, EndIndex, VNI));
12861288
}
12871289
}
12881290
}
@@ -1302,8 +1304,18 @@ MachineBasicBlock *MachineBasicBlock::SplitCriticalEdge(
13021304
VNInfo *VNI = LI.getVNInfoAt(PrevIndex);
13031305
assert(VNI && "LiveInterval should have VNInfo where it is live.");
13041306
LI.addSegment(LiveInterval::Segment(StartIndex, EndIndex, VNI));
1307+
// Update subranges with live values
1308+
for (auto &SR : LI.subranges()) {
1309+
VNInfo *VNI = SR.getVNInfoAt(PrevIndex);
1310+
if (VNI)
1311+
SR.addSegment(LiveInterval::Segment(StartIndex, EndIndex, VNI));
1312+
}
13051313
} else if (!isLiveOut && !isLastMBB) {
13061314
LI.removeSegment(StartIndex, EndIndex);
1315+
for (auto &SR : LI.subranges()) {
1316+
if (SR.overlaps(StartIndex, EndIndex))
1317+
SR.removeSegment(StartIndex, EndIndex);
1318+
}
13071319
}
13081320
}
13091321

‎llvm/lib/CodeGen/PHIElimination.cpp

Lines changed: 49 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -136,6 +136,7 @@ INITIALIZE_PASS_END(PHIElimination, DEBUG_TYPE,
136136

137137
void PHIElimination::getAnalysisUsage(AnalysisUsage &AU) const {
138138
AU.addUsedIfAvailable<LiveVariables>();
139+
AU.addUsedIfAvailable<LiveIntervals>();
139140
AU.addPreserved<LiveVariables>();
140141
AU.addPreserved<SlotIndexes>();
141142
AU.addPreserved<LiveIntervals>();
@@ -389,7 +390,7 @@ void PHIElimination::LowerPHINode(MachineBasicBlock &MBB,
389390
if (IncomingReg) {
390391
// Add the region from the beginning of MBB to the copy instruction to
391392
// IncomingReg's live interval.
392-
LiveInterval &IncomingLI = LIS->createEmptyInterval(IncomingReg);
393+
LiveInterval &IncomingLI = LIS->getOrCreateEmptyInterval(IncomingReg);
393394
VNInfo *IncomingVNI = IncomingLI.getVNInfoAt(MBBStartIndex);
394395
if (!IncomingVNI)
395396
IncomingVNI = IncomingLI.getNextValue(MBBStartIndex,
@@ -400,24 +401,50 @@ void PHIElimination::LowerPHINode(MachineBasicBlock &MBB,
400401
}
401402

402403
LiveInterval &DestLI = LIS->getInterval(DestReg);
403-
assert(!DestLI.empty() && "PHIs should have nonempty LiveIntervals.");
404-
if (DestLI.endIndex().isDead()) {
405-
// A dead PHI's live range begins and ends at the start of the MBB, but
406-
// the lowered copy, which will still be dead, needs to begin and end at
407-
// the copy instruction.
408-
VNInfo *OrigDestVNI = DestLI.getVNInfoAt(MBBStartIndex);
409-
assert(OrigDestVNI && "PHI destination should be live at block entry.");
410-
DestLI.removeSegment(MBBStartIndex, MBBStartIndex.getDeadSlot());
411-
DestLI.createDeadDef(DestCopyIndex.getRegSlot(),
412-
LIS->getVNInfoAllocator());
413-
DestLI.removeValNo(OrigDestVNI);
414-
} else {
415-
// Otherwise, remove the region from the beginning of MBB to the copy
416-
// instruction from DestReg's live interval.
417-
DestLI.removeSegment(MBBStartIndex, DestCopyIndex.getRegSlot());
418-
VNInfo *DestVNI = DestLI.getVNInfoAt(DestCopyIndex.getRegSlot());
404+
assert(!DestLI.empty() && "PHIs should have non-empty LiveIntervals.");
405+
406+
SlotIndex NewStart = DestCopyIndex.getRegSlot();
407+
408+
SmallVector<LiveRange *> ToUpdate;
409+
ToUpdate.push_back(&DestLI);
410+
for (auto &SR : DestLI.subranges())
411+
ToUpdate.push_back(&SR);
412+
413+
for (auto LR : ToUpdate) {
414+
auto DestSegment = LR->find(MBBStartIndex);
415+
assert(DestSegment != LR->end() &&
416+
"PHI destination must be live in block");
417+
418+
if (LR->endIndex().isDead()) {
419+
// A dead PHI's live range begins and ends at the start of the MBB, but
420+
// the lowered copy, which will still be dead, needs to begin and end at
421+
// the copy instruction.
422+
VNInfo *OrigDestVNI = LR->getVNInfoAt(DestSegment->start);
423+
assert(OrigDestVNI && "PHI destination should be live at block entry.");
424+
LR->removeSegment(DestSegment->start, DestSegment->start.getDeadSlot());
425+
LR->createDeadDef(NewStart, LIS->getVNInfoAllocator());
426+
LR->removeValNo(OrigDestVNI);
427+
continue;
428+
}
429+
430+
if (DestSegment->start > NewStart) {
431+
// With a single PHI removed from block the index of the copy may be
432+
// lower than the original PHI. Extend live range backward to cover
433+
// the copy.
434+
VNInfo *VNI = LR->getVNInfoAt(DestSegment->start);
435+
assert(VNI && "value should be defined for known segment");
436+
LR->addSegment(
437+
LiveInterval::Segment(NewStart, DestSegment->start, VNI));
438+
} else if (DestSegment->start < NewStart) {
439+
// Otherwise, remove the region from the beginning of MBB to the copy
440+
// instruction from DestReg's live interval.
441+
assert(DestSegment->start >= MBBStartIndex);
442+
assert(DestSegment->end >= DestCopyIndex.getRegSlot());
443+
LR->removeSegment(DestSegment->start, NewStart);
444+
}
445+
VNInfo *DestVNI = LR->getVNInfoAt(NewStart);
419446
assert(DestVNI && "PHI destination should be live at its definition.");
420-
DestVNI->def = DestCopyIndex.getRegSlot();
447+
DestVNI->def = NewStart;
421448
}
422449
}
423450

@@ -612,6 +639,10 @@ void PHIElimination::LowerPHINode(MachineBasicBlock &MBB,
612639
SlotIndex LastUseIndex = LIS->getInstructionIndex(*KillInst);
613640
SrcLI.removeSegment(LastUseIndex.getRegSlot(),
614641
LIS->getMBBEndIdx(&opBlock));
642+
for (auto &SR : SrcLI.subranges()) {
643+
SR.removeSegment(LastUseIndex.getRegSlot(),
644+
LIS->getMBBEndIdx(&opBlock));
645+
}
615646
}
616647
}
617648
}

‎llvm/test/CodeGen/AMDGPU/split-mbb-lis-subrange.mir

Lines changed: 15 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -1,15 +1,15 @@
11
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 2
2-
# RUN: llc -march=amdgcn -mcpu=gfx1100 -verify-machineinstrs -run-pass liveintervals -o - %s | FileCheck -check-prefixes=GCN %s
2+
# RUN: llc -march=amdgcn -mcpu=gfx1100 -verify-machineinstrs -run-pass liveintervals,phi-node-elimination -o - %s | FileCheck -check-prefixes=GCN %s
33

4-
# This test simply checks that liveintervals pass verification.
4+
# This checks liveintervals pass verification and phi-node-elimination correctly preserves them.
55

66
---
77
name: split_critical_edge_subranges
88
tracksRegLiveness: true
99
body: |
1010
; GCN-LABEL: name: split_critical_edge_subranges
1111
; GCN: bb.0:
12-
; GCN-NEXT: successors: %bb.3(0x40000000), %bb.1(0x40000000)
12+
; GCN-NEXT: successors: %bb.5(0x40000000), %bb.1(0x40000000)
1313
; GCN-NEXT: {{ $}}
1414
; GCN-NEXT: %coord:vreg_64 = IMPLICIT_DEF
1515
; GCN-NEXT: %desc:sgpr_256 = IMPLICIT_DEF
@@ -20,14 +20,22 @@ body: |
2020
; GCN-NEXT: %s0a:vgpr_32 = COPY %load.sub0
2121
; GCN-NEXT: %s0b:vgpr_32 = COPY %load.sub1
2222
; GCN-NEXT: S_CMP_EQ_U32 %c0, %c1, implicit-def $scc
23-
; GCN-NEXT: S_CBRANCH_SCC1 %bb.3, implicit $scc
24-
; GCN-NEXT: S_BRANCH %bb.1
23+
; GCN-NEXT: S_CBRANCH_SCC0 %bb.1, implicit $scc
24+
; GCN-NEXT: {{ $}}
25+
; GCN-NEXT: bb.5:
26+
; GCN-NEXT: successors: %bb.3(0x80000000)
27+
; GCN-NEXT: {{ $}}
28+
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY %s0a
29+
; GCN-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY %s0b
30+
; GCN-NEXT: S_BRANCH %bb.3
2531
; GCN-NEXT: {{ $}}
2632
; GCN-NEXT: bb.1:
2733
; GCN-NEXT: successors: %bb.3(0x80000000)
2834
; GCN-NEXT: {{ $}}
2935
; GCN-NEXT: %s0c:vgpr_32 = V_ADD_F32_e64 0, %s0a, 0, %const, 0, 0, implicit $mode, implicit $exec
3036
; GCN-NEXT: %s0d:vgpr_32 = V_ADD_F32_e64 0, %s0b, 0, %const, 0, 0, implicit $mode, implicit $exec
37+
; GCN-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY %s0c
38+
; GCN-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY %s0d
3139
; GCN-NEXT: S_BRANCH %bb.3
3240
; GCN-NEXT: {{ $}}
3341
; GCN-NEXT: bb.2:
@@ -37,8 +45,8 @@ body: |
3745
; GCN-NEXT: bb.3:
3846
; GCN-NEXT: successors: %bb.4(0x80000000)
3947
; GCN-NEXT: {{ $}}
40-
; GCN-NEXT: %phi0:vgpr_32 = PHI %s0a, %bb.0, %s0c, %bb.1
41-
; GCN-NEXT: %phi1:vgpr_32 = PHI %s0b, %bb.0, %s0d, %bb.1
48+
; GCN-NEXT: %phi1:vgpr_32 = COPY [[COPY3]]
49+
; GCN-NEXT: %phi0:vgpr_32 = COPY [[COPY2]]
4250
; GCN-NEXT: S_BRANCH %bb.4
4351
; GCN-NEXT: {{ $}}
4452
; GCN-NEXT: bb.4:

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