Skip to content

Commit c47fe18

Browse files
jerryyiransunjerryyiransun
committed
refine TableGen files to comply with clang-tidy checks
1 parent 5c66f2f commit c47fe18

15 files changed

+493
-493
lines changed

‎llvm/utils/TableGen/ARMTargetDefEmitter.cpp

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -25,19 +25,19 @@
2525
using namespace llvm;
2626

2727
/// Collect the full set of implied features for a SubtargetFeature.
28-
static void CollectImpliedFeatures(std::set<const Record *> &SeenFeats,
28+
static void collectImpliedFeatures(std::set<const Record *> &SeenFeats,
2929
const Record *Rec) {
3030
assert(Rec->isSubClassOf("SubtargetFeature") &&
3131
"Rec is not a SubtargetFeature");
3232

3333
SeenFeats.insert(Rec);
3434
for (const Record *Implied : Rec->getValueAsListOfDefs("Implies"))
35-
CollectImpliedFeatures(SeenFeats, Implied);
35+
collectImpliedFeatures(SeenFeats, Implied);
3636
}
3737

38-
static void CheckFeatureTree(const Record *Root) {
38+
static void checkFeatureTree(const Record *Root) {
3939
std::set<const Record *> SeenFeats;
40-
CollectImpliedFeatures(SeenFeats, Root);
40+
collectImpliedFeatures(SeenFeats, Root);
4141

4242
// Check that each of the mandatory (implied) features which is an
4343
// ExtensionWithMArch is also enabled by default.
@@ -53,12 +53,12 @@ static void CheckFeatureTree(const Record *Root) {
5353
}
5454
}
5555

56-
static void EmitARMTargetDef(const RecordKeeper &RK, raw_ostream &OS) {
56+
static void emitArmTargetDef(const RecordKeeper &RK, raw_ostream &OS) {
5757
OS << "// Autogenerated by ARMTargetDefEmitter.cpp\n\n";
5858

5959
// Look through all SubtargetFeature defs with the given FieldName, and
6060
// collect the set of all Values that that FieldName is set to.
61-
auto gatherSubtargetFeatureFieldValues = [&RK](StringRef FieldName) {
61+
auto GatherSubtargetFeatureFieldValues = [&RK](StringRef FieldName) {
6262
llvm::StringSet<> Set;
6363
for (const Record *Rec : RK.getAllDerivedDefinitions("SubtargetFeature")) {
6464
if (Rec->getValueAsString("FieldName") == FieldName) {
@@ -88,7 +88,7 @@ static void EmitARMTargetDef(const RecordKeeper &RK, raw_ostream &OS) {
8888
<< "#define ARM_PROCESSOR_FAMILY(ENUM)\n"
8989
<< "#endif\n\n";
9090
const StringSet<> ARMProcFamilyVals =
91-
gatherSubtargetFeatureFieldValues("ARMProcFamily");
91+
GatherSubtargetFeatureFieldValues("ARMProcFamily");
9292
for (const StringRef &Family : ARMProcFamilyVals.keys())
9393
OS << "ARM_PROCESSOR_FAMILY(" << Family << ")\n";
9494
OS << "\n#undef ARM_PROCESSOR_FAMILY\n\n";
@@ -97,7 +97,7 @@ static void EmitARMTargetDef(const RecordKeeper &RK, raw_ostream &OS) {
9797
<< "#define ARM_ARCHITECTURE(ENUM)\n"
9898
<< "#endif\n\n";
9999
// This should correspond to instances of the Architecture tablegen class.
100-
const StringSet<> ARMArchVals = gatherSubtargetFeatureFieldValues("ARMArch");
100+
const StringSet<> ARMArchVals = GatherSubtargetFeatureFieldValues("ARMArch");
101101
for (const StringRef &Arch : ARMArchVals.keys())
102102
OS << "ARM_ARCHITECTURE(" << Arch << ")\n";
103103
OS << "\n#undef ARM_ARCHITECTURE\n\n";
@@ -315,7 +315,7 @@ static void EmitARMTargetDef(const RecordKeeper &RK, raw_ostream &OS) {
315315
auto Profile = Arch->getValueAsString("Profile");
316316
auto ArchInfo = ArchInfoName(Major, Minor, Profile);
317317

318-
CheckFeatureTree(Arch);
318+
checkFeatureTree(Arch);
319319

320320
OS << " {\n"
321321
<< " \"" << Name << "\",\n"
@@ -343,5 +343,5 @@ static void EmitARMTargetDef(const RecordKeeper &RK, raw_ostream &OS) {
343343
}
344344

345345
static TableGen::Emitter::Opt
346-
X("gen-arm-target-def", EmitARMTargetDef,
346+
X("gen-arm-target-def", emitArmTargetDef,
347347
"Generate the ARM or AArch64 Architecture information header.");

‎llvm/utils/TableGen/CallingConvEmitter.cpp

Lines changed: 24 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -34,12 +34,12 @@ class CallingConvEmitter {
3434
public:
3535
explicit CallingConvEmitter(const RecordKeeper &R) : Records(R) {}
3636

37-
void run(raw_ostream &o);
37+
void run(raw_ostream &O);
3838

3939
private:
40-
void EmitCallingConv(const Record *CC, raw_ostream &O);
41-
void EmitAction(const Record *Action, indent Indent, raw_ostream &O);
42-
void EmitArgRegisterLists(raw_ostream &O);
40+
void emitCallingConv(const Record *CC, raw_ostream &O);
41+
void emitAction(const Record *Action, indent Indent, raw_ostream &O);
42+
void emitArgRegisterLists(raw_ostream &O);
4343
};
4444
} // End anonymous namespace
4545

@@ -74,16 +74,16 @@ void CallingConvEmitter::run(raw_ostream &O) {
7474
Records.startTimer("Emit full descriptions");
7575
for (const Record *CC : CCs) {
7676
if (!CC->getValueAsBit("Custom")) {
77-
EmitCallingConv(CC, O);
77+
emitCallingConv(CC, O);
7878
}
7979
}
8080

81-
EmitArgRegisterLists(O);
81+
emitArgRegisterLists(O);
8282

8383
O << "\n#endif // CC_REGISTER_LIST\n";
8484
}
8585

86-
void CallingConvEmitter::EmitCallingConv(const Record *CC, raw_ostream &O) {
86+
void CallingConvEmitter::emitCallingConv(const Record *CC, raw_ostream &O) {
8787
const ListInit *CCActions = CC->getValueAsListInit("Actions");
8888
Counter = 0;
8989

@@ -106,8 +106,8 @@ void CallingConvEmitter::EmitCallingConv(const Record *CC, raw_ostream &O) {
106106
<< std::string(Pad, ' ') << "MVT LocVT, CCValAssign::LocInfo LocInfo,\n"
107107
<< std::string(Pad, ' ') << "ISD::ArgFlagsTy ArgFlags, CCState &State) {\n";
108108
// Emit all of the actions, in order.
109-
for (unsigned i = 0, e = CCActions->size(); i != e; ++i) {
110-
const Record *Action = CCActions->getElementAsRecord(i);
109+
for (unsigned I = 0, E = CCActions->size(); I != E; ++I) {
110+
const Record *Action = CCActions->getElementAsRecord(I);
111111
SwiftAction =
112112
llvm::any_of(Action->getSuperClasses(),
113113
[](const std::pair<const Record *, SMRange> &Class) {
@@ -116,23 +116,23 @@ void CallingConvEmitter::EmitCallingConv(const Record *CC, raw_ostream &O) {
116116
});
117117

118118
O << "\n";
119-
EmitAction(Action, indent(2), O);
119+
emitAction(Action, indent(2), O);
120120
}
121121

122122
O << "\n return true; // CC didn't match.\n";
123123
O << "}\n";
124124
}
125125

126-
void CallingConvEmitter::EmitAction(const Record *Action, indent Indent,
126+
void CallingConvEmitter::emitAction(const Record *Action, indent Indent,
127127
raw_ostream &O) {
128128
if (Action->isSubClassOf("CCPredicateAction")) {
129129
O << Indent << "if (";
130130

131131
if (Action->isSubClassOf("CCIfType")) {
132132
const ListInit *VTs = Action->getValueAsListInit("VTs");
133-
for (unsigned i = 0, e = VTs->size(); i != e; ++i) {
134-
const Record *VT = VTs->getElementAsRecord(i);
135-
if (i != 0)
133+
for (unsigned I = 0, E = VTs->size(); I != E; ++I) {
134+
const Record *VT = VTs->getElementAsRecord(I);
135+
if (I != 0)
136136
O << " ||\n " << Indent;
137137
O << "LocVT == " << getEnumName(getValueType(VT));
138138
}
@@ -145,7 +145,7 @@ void CallingConvEmitter::EmitAction(const Record *Action, indent Indent,
145145
}
146146

147147
O << ") {\n";
148-
EmitAction(Action->getValueAsDef("SubAction"), Indent + 2, O);
148+
emitAction(Action->getValueAsDef("SubAction"), Indent + 2, O);
149149
O << Indent << "}\n";
150150
} else {
151151
if (Action->isSubClassOf("CCDelegateTo")) {
@@ -170,8 +170,8 @@ void CallingConvEmitter::EmitAction(const Record *Action, indent Indent,
170170
<< "[] = {\n";
171171
O << Indent << " ";
172172
ListSeparator LS;
173-
for (unsigned i = 0, e = RegList->size(); i != e; ++i) {
174-
std::string Name = getQualifiedName(RegList->getElementAsRecord(i));
173+
for (unsigned I = 0, E = RegList->size(); I != E; ++I) {
174+
std::string Name = getQualifiedName(RegList->getElementAsRecord(I));
175175
if (SwiftAction)
176176
AssignedSwiftRegsMap[CurrentAction].insert(Name);
177177
else
@@ -229,16 +229,16 @@ void CallingConvEmitter::EmitAction(const Record *Action, indent Indent,
229229
<< "[] = {\n";
230230
O << Indent << " ";
231231
ListSeparator LS;
232-
for (unsigned i = 0, e = RegList->size(); i != e; ++i)
233-
O << LS << getQualifiedName(RegList->getElementAsRecord(i));
232+
for (unsigned I = 0, E = RegList->size(); I != E; ++I)
233+
O << LS << getQualifiedName(RegList->getElementAsRecord(I));
234234
O << "\n" << Indent << "};\n";
235235

236236
O << Indent << "static const MCPhysReg RegList" << ShadowRegListNumber
237237
<< "[] = {\n";
238238
O << Indent << " ";
239239
ListSeparator LSS;
240-
for (unsigned i = 0, e = ShadowRegList->size(); i != e; ++i)
241-
O << LSS << getQualifiedName(ShadowRegList->getElementAsRecord(i));
240+
for (unsigned I = 0, E = ShadowRegList->size(); I != E; ++I)
241+
O << LSS << getQualifiedName(ShadowRegList->getElementAsRecord(I));
242242
O << "\n" << Indent << "};\n";
243243

244244
O << Indent << "if (MCRegister Reg = State.AllocateReg(RegList"
@@ -286,8 +286,8 @@ void CallingConvEmitter::EmitAction(const Record *Action, indent Indent,
286286
<< ShadowRegListNumber << "[] = {\n";
287287
O << Indent << " ";
288288
ListSeparator LS;
289-
for (unsigned i = 0, e = ShadowRegList->size(); i != e; ++i)
290-
O << LS << getQualifiedName(ShadowRegList->getElementAsRecord(i));
289+
for (unsigned I = 0, E = ShadowRegList->size(); I != E; ++I)
290+
O << LS << getQualifiedName(ShadowRegList->getElementAsRecord(I));
291291
O << "\n" << Indent << "};\n";
292292

293293
O << Indent << "int64_t Offset" << ++Counter << " = State.AllocateStack("
@@ -356,7 +356,7 @@ void CallingConvEmitter::EmitAction(const Record *Action, indent Indent,
356356
}
357357
}
358358

359-
void CallingConvEmitter::EmitArgRegisterLists(raw_ostream &O) {
359+
void CallingConvEmitter::emitArgRegisterLists(raw_ostream &O) {
360360
// Transitively merge all delegated CCs into AssignedRegsMap.
361361
using EntryTy = std::pair<std::string, std::set<std::string>>;
362362
bool Redo;

0 commit comments

Comments
 (0)