[X86] Regenerate combine-or.ll

Author: RKSimon

llvm/test/CodeGen/X86/combine-or.ll

@@ -236,25 +236,15 @@ define <4 x i32> @test17(<4 x i32> %a, <4 x i32> %b) {
 
 
 define <4 x i32> @test18(<4 x i32> %a, <4 x i32> %b) {
-; CHECK-LV-LABEL: test18:
-; CHECK-LV:       # %bb.0:
-; CHECK-LV-NEXT:    pxor %xmm2, %xmm2
-; CHECK-LV-NEXT:    pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm2[2,3,4,5,6,7]
-; CHECK-LV-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[1,0,1,1]
-; CHECK-LV-NEXT:    pblendw {{.*#+}} xmm2 = xmm1[0,1],xmm2[2,3,4,5,6,7]
-; CHECK-LV-NEXT:    por %xmm0, %xmm2
-; CHECK-LV-NEXT:    movdqa %xmm2, %xmm0
-; CHECK-LV-NEXT:    retq
-;
-; CHECK-LIS-LABEL: test18:
-; CHECK-LIS:       # %bb.0:
-; CHECK-LIS-NEXT:    pxor %xmm2, %xmm2
-; CHECK-LIS-NEXT:    pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm2[2,3,4,5,6,7]
-; CHECK-LIS-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[1,0,1,1]
-; CHECK-LIS-NEXT:    pblendw {{.*#+}} xmm2 = xmm1[0,1],xmm2[2,3,4,5,6,7]
-; CHECK-LIS-NEXT:    por %xmm0, %xmm2
-; CHECK-LIS-NEXT:    movdqa %xmm2, %xmm0
-; CHECK-LIS-NEXT:    retq
+; CHECK-LABEL: test18:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    pxor %xmm2, %xmm2
+; CHECK-NEXT:    pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm2[2,3,4,5,6,7]
+; CHECK-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[1,0,1,1]
+; CHECK-NEXT:    pblendw {{.*#+}} xmm2 = xmm1[0,1],xmm2[2,3,4,5,6,7]
+; CHECK-NEXT:    por %xmm0, %xmm2
+; CHECK-NEXT:    movdqa %xmm2, %xmm0
+; CHECK-NEXT:    retq
   %shuf1 = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32><i32 4, i32 0, i32 4, i32 4>
   %shuf2 = shufflevector <4 x i32> %b, <4 x i32> zeroinitializer, <4 x i32><i32 0, i32 4, i32 4, i32 4>
   %or = or <4 x i32> %shuf1, %shuf2
@@ -622,3 +612,6 @@ define i32 @or_and_multiuse_and_multiuse_i32(i32 %x, i32 %y) nounwind {
 }
 
 declare void @use_i32(i32)
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; CHECK-LIS: {{.*}}
+; CHECK-LV: {{.*}}