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JonPsson1JonPsson1
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Make WFMADB/WFMASB clobber CC
1 parent cc45e60 commit c4e014f

13 files changed

+97
-77
lines changed

‎llvm/lib/Target/SystemZ/SystemZFinalizeRegMem.cpp

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -71,6 +71,8 @@ bool SystemZFinalizeRegMem::visitMBB(MachineBasicBlock &MBB) {
7171
: PseudoOpcode == SystemZ::WFASB_CCPseudo ? SystemZ::WFASB
7272
: PseudoOpcode == SystemZ::WFSDB_CCPseudo ? SystemZ::WFSDB
7373
: PseudoOpcode == SystemZ::WFSSB_CCPseudo ? SystemZ::WFSSB
74+
: PseudoOpcode == SystemZ::WFMADB_CCPseudo ? SystemZ::WFMADB
75+
: PseudoOpcode == SystemZ::WFMASB_CCPseudo ? SystemZ::WFMASB
7476
: 0;
7577
if (TargetOpcode) {
7678
MI.setDesc(TII->get(TargetOpcode));

‎llvm/lib/Target/SystemZ/SystemZInstrFormats.td

Lines changed: 15 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -5550,3 +5550,18 @@ multiclass BinaryVRRcAndCCPseudo<string mnemonic, bits<16> opcode,
55505550
(operator (tr2.vt tr2.op:$V2),
55515551
(tr2.vt tr2.op:$V3)))]>;
55525552
}
5553+
5554+
multiclass TernaryVRReAndCCPseudo<string mnemonic, bits<16> opcode,
5555+
SDPatternOperator operator,
5556+
TypedReg tr1, TypedReg tr2, bits<4> m5 = 0,
5557+
bits<4> type = 0, string fp_mnemonic = ""> {
5558+
def "" : TernaryVRRe<mnemonic, opcode, null_frag, tr1, tr2, m5, type,
5559+
fp_mnemonic>;
5560+
let Defs = [CC] in
5561+
def _CCPseudo : Pseudo<(outs tr1.op:$V1),
5562+
(ins tr2.op:$V2, tr2.op:$V3, tr1.op:$V4),
5563+
[(set (tr1.vt tr1.op:$V1),
5564+
(operator (tr2.vt tr2.op:$V2),
5565+
(tr2.vt tr2.op:$V3),
5566+
(tr1.vt tr1.op:$V4)))]>;
5567+
}

‎llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -654,7 +654,7 @@ MachineInstr *SystemZInstrInfo::optimizeLoadInstr(MachineInstr &MI,
654654
: MI.getOpcode() == SystemZ::WFSDB_CCPseudo ? SystemZ::SDB
655655
: MI.getOpcode() == SystemZ::WFMDB ? SystemZ::MDB
656656
: MI.getOpcode() == SystemZ::WFDDB ? SystemZ::DDB
657-
: MI.getOpcode() == SystemZ::WFMADB ? SystemZ::MADB
657+
: MI.getOpcode() == SystemZ::WFMADB_CCPseudo ? SystemZ::MADB
658658
: MI.getOpcode() == SystemZ::WFMSDB ? SystemZ::MSDB
659659
: MI.getOpcode() == SystemZ::WFSQDB ? SystemZ::SQDB
660660
: MI.getOpcode() == SystemZ::WFCDB ? SystemZ::CDB
@@ -668,7 +668,7 @@ MachineInstr *SystemZInstrInfo::optimizeLoadInstr(MachineInstr &MI,
668668
: MI.getOpcode() == SystemZ::WFSSB_CCPseudo ? SystemZ::SEB
669669
: MI.getOpcode() == SystemZ::WFMSB ? SystemZ::MEEB
670670
: MI.getOpcode() == SystemZ::WFDSB ? SystemZ::DEB
671-
: MI.getOpcode() == SystemZ::WFMASB ? SystemZ::MAEB
671+
: MI.getOpcode() == SystemZ::WFMASB_CCPseudo ? SystemZ::MAEB
672672
: MI.getOpcode() == SystemZ::WFMSSB ? SystemZ::MSEB
673673
: MI.getOpcode() == SystemZ::WFSQSB ? SystemZ::SQEB
674674
: MI.getOpcode() == SystemZ::WFCSB ? SystemZ::CEB
@@ -1141,8 +1141,8 @@ bool SystemZInstrInfo::IsReassociableFMA(const MachineInstr *MI) const {
11411141
case SystemZ::VFMADB:
11421142
case SystemZ::VFMASB:
11431143
case SystemZ::WFMAXB:
1144-
case SystemZ::WFMADB:
1145-
case SystemZ::WFMASB:
1144+
case SystemZ::WFMADB_CCPseudo:
1145+
case SystemZ::WFMASB_CCPseudo:
11461146
return hasReassocFlags(MI);
11471147
default:
11481148
break;
@@ -1351,9 +1351,9 @@ static void getSplitFMAOpcodes(unsigned FMAOpc, unsigned &AddOpc,
13511351
case SystemZ::VFMADB: AddOpc = SystemZ::VFADB; MulOpc = SystemZ::VFMDB; break;
13521352
case SystemZ::VFMASB: AddOpc = SystemZ::VFASB; MulOpc = SystemZ::VFMSB; break;
13531353
case SystemZ::WFMAXB: AddOpc = SystemZ::WFAXB; MulOpc = SystemZ::WFMXB; break;
1354-
case SystemZ::WFMADB:
1354+
case SystemZ::WFMADB_CCPseudo:
13551355
AddOpc = SystemZ::WFADB_CCPseudo; MulOpc = SystemZ::WFMDB; break;
1356-
case SystemZ::WFMASB:
1356+
case SystemZ::WFMASB_CCPseudo:
13571357
AddOpc = SystemZ::WFASB_CCPseudo; MulOpc = SystemZ::WFMSB; break;
13581358
default:
13591359
llvm_unreachable("Expected FMA opcode.");

‎llvm/lib/Target/SystemZ/SystemZInstrVector.td

Lines changed: 12 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -1286,17 +1286,20 @@ let Predicates = [FeatureVector] in {
12861286
}
12871287
}
12881288

1289-
// Multiply and add.
1289+
// Multiply and add. 64/32-bit may participate in reassociation during
1290+
// machine-combining together with additions. Pretend that they clobber CC
1291+
// so that an Add that gets pulled down to its place can later be folded to
1292+
// a reg/mem, which clobber CC (while MADB/MAEB do not).
12901293
let Uses = [FPC], mayRaiseFPException = 1, isCommutable = 1 in {
1291-
def VFMA : TernaryVRReFloatGeneric<"vfma", 0xE78F>;
1292-
def VFMADB : TernaryVRRe<"vfmadb", 0xE78F, any_fma, v128db, v128db, 0, 3>;
1293-
def WFMADB : TernaryVRRe<"wfmadb", 0xE78F, any_fma, v64db, v64db, 8, 3,
1294-
"madbr">;
1294+
def VFMA : TernaryVRReFloatGeneric<"vfma", 0xE78F>;
1295+
def VFMADB : TernaryVRRe<"vfmadb", 0xE78F, any_fma, v128db, v128db, 0, 3>;
1296+
defm WFMADB : TernaryVRReAndCCPseudo<"wfmadb", 0xE78F, any_fma, v64db, v64db,
1297+
8, 3, "madbr">;
12951298
let Predicates = [FeatureVectorEnhancements1] in {
1296-
def VFMASB : TernaryVRRe<"vfmasb", 0xE78F, any_fma, v128sb, v128sb, 0, 2>;
1297-
def WFMASB : TernaryVRRe<"wfmasb", 0xE78F, any_fma, v32sb, v32sb, 8, 2,
1298-
"maebr">;
1299-
def WFMAXB : TernaryVRRe<"wfmaxb", 0xE78F, any_fma, v128xb, v128xb, 8, 4>;
1299+
def VFMASB : TernaryVRRe<"vfmasb", 0xE78F, any_fma, v128sb, v128sb, 0, 2>;
1300+
defm WFMASB : TernaryVRReAndCCPseudo<"wfmasb", 0xE78F, any_fma, v32sb, v32sb,
1301+
8, 2, "maebr">;
1302+
def WFMAXB : TernaryVRRe<"wfmaxb", 0xE78F, any_fma, v128xb, v128xb, 8, 4>;
13001303
}
13011304
}
13021305

‎llvm/lib/Target/SystemZ/SystemZScheduleZ13.td

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1352,7 +1352,7 @@ def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VFMDB$")>;
13521352
def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WFMDB$")>;
13531353
def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VFM(A|S)$")>;
13541354
def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VFM(A|S)DB$")>;
1355-
def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WFM(A|S)DB$")>;
1355+
def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WFM(A|S)DB(_CCPseudo)?$")>;
13561356

13571357
// Divide / square root
13581358
def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "VFD$")>;

‎llvm/lib/Target/SystemZ/SystemZScheduleZ14.td

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1401,9 +1401,9 @@ def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VFMSB$")>;
14011401
def : InstRW<[WLat20, VecDF2, NormalGr], (instregex "WFMXB$")>;
14021402
def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VF(N)?M(A|S)$")>;
14031403
def : InstRW<[WLat7, VecBF, NormalGr], (instregex "VF(N)?M(A|S)DB$")>;
1404-
def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WF(N)?M(A|S)DB$")>;
1404+
def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WF(N)?M(A|S)DB(_CCPseudo)?$")>;
14051405
def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VF(N)?M(A|S)SB$")>;
1406-
def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WF(N)?M(A|S)SB$")>;
1406+
def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WF(N)?M(A|S)SB(_CCPseudo)?$")>;
14071407
def : InstRW<[WLat30, VecDF2, NormalGr], (instregex "WF(N)?M(A|S)XB$")>;
14081408

14091409
// Divide / square root

‎llvm/lib/Target/SystemZ/SystemZScheduleZ15.td

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1443,9 +1443,9 @@ def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VFMSB$")>;
14431443
def : InstRW<[WLat20, VecDF2, NormalGr], (instregex "WFMXB$")>;
14441444
def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VF(N)?M(A|S)$")>;
14451445
def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VF(N)?M(A|S)DB$")>;
1446-
def : InstRW<[WLat6, VecBF, NormalGr], (instregex "WF(N)?M(A|S)DB$")>;
1446+
def : InstRW<[WLat6, VecBF, NormalGr], (instregex "WF(N)?M(A|S)DB(_CCPseudo)?$")>;
14471447
def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VF(N)?M(A|S)SB$")>;
1448-
def : InstRW<[WLat6, VecBF, NormalGr], (instregex "WF(N)?M(A|S)SB$")>;
1448+
def : InstRW<[WLat6, VecBF, NormalGr], (instregex "WF(N)?M(A|S)SB(_CCPseudo)?$")>;
14491449
def : InstRW<[WLat30, VecDF2, NormalGr], (instregex "WF(N)?M(A|S)XB$")>;
14501450

14511451
// Divide / square root

‎llvm/lib/Target/SystemZ/SystemZScheduleZ16.td

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1449,9 +1449,9 @@ def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VFMSB$")>;
14491449
def : InstRW<[WLat20, VecDF2, NormalGr], (instregex "WFMXB$")>;
14501450
def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VF(N)?M(A|S)$")>;
14511451
def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VF(N)?M(A|S)DB$")>;
1452-
def : InstRW<[WLat6, VecBF, NormalGr], (instregex "WF(N)?M(A|S)DB$")>;
1452+
def : InstRW<[WLat6, VecBF, NormalGr], (instregex "WF(N)?M(A|S)DB(_CCPseudo)?$")>;
14531453
def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VF(N)?M(A|S)SB$")>;
1454-
def : InstRW<[WLat6, VecBF, NormalGr], (instregex "WF(N)?M(A|S)SB$")>;
1454+
def : InstRW<[WLat6, VecBF, NormalGr], (instregex "WF(N)?M(A|S)SB(_CCPseudo)?$")>;
14551455
def : InstRW<[WLat20, VecDF2, NormalGr], (instregex "WF(N)?M(A|S)XB$")>;
14561456

14571457
// Divide / square root

‎llvm/test/CodeGen/SystemZ/fp-regmem-folding-02.ll

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -7,10 +7,10 @@ define void @f0(float %A, ptr %src, ptr %dst) {
77
; CHECK-LABEL: bb.0 (%ir-block.0):
88
; CHECK: %3:vr32bit = VL32 [[ADDR1:%[0-9]+:addr64bit]], 4, $noreg :: (load (s32) from %ir.arrayidx1)
99
; CHECK-NEXT: %4:vr32bit = VL32 %1:addr64bit, 8, $noreg :: (load (s32) from %ir.arrayidx2)
10-
; CHECK-NEXT: vr32bit = contract nofpexcept WFMASB killed %3:vr32bit, killed %4:vr32bit, %0:fp32bit, implicit $fpc
10+
; CHECK-NEXT: vr32bit = contract nofpexcept WFMASB_CCPseudo killed %3:vr32bit, killed %4:vr32bit, %0:fp32bit, implicit-def dead $cc, implicit $fpc
1111
; CHECK: %6:vr32bit = VL32 %1:addr64bit, 12, $noreg :: (load (s32) from %ir.arrayidx3)
1212
; CHECK-NEXT: %7:vr32bit = VL32 %1:addr64bit, 16, $noreg :: (load (s32) from %ir.arrayidx4)
13-
; CHECK-NEXT: %8:vr32bit = contract nofpexcept WFMASB %6:vr32bit, %7:vr32bit, %0:fp32bit, implicit $fpc
13+
; CHECK-NEXT: %8:vr32bit = contract nofpexcept WFMASB_CCPseudo %6:vr32bit, %7:vr32bit, %0:fp32bit, implicit-def dead $cc, implicit $fpc
1414
; CHECK-NEXT: VST32 killed %8:vr32bit, %2:addr64bit, 0, $noreg :: (volatile store (s32) into %ir.dst)
1515
; CHECK-NEXT: VST32 %6:vr32bit, %2:addr64bit, 0, $noreg :: (volatile store (s32) into %ir.dst)
1616
; CHECK-NEXT: VST32 %7:vr32bit, %2:addr64bit, 0, $noreg :: (volatile store (s32) into %ir.dst)
@@ -19,7 +19,7 @@ define void @f0(float %A, ptr %src, ptr %dst) {
1919
; CHECK-NEXT: # Machine code for function f0: IsSSA, TracksLiveness
2020
; CHECK-LABEL: bb.0 (%ir-block.0):
2121
; CHECK: fp32bit = nofpexcept MAEB %0:fp32bit(tied-def 0), killed %4:fp32bit, [[ADDR1]], 4, $noreg, implicit $fpc :: (load (s32) from %ir.arrayidx1)
22-
; CHECK: vr32bit = contract nofpexcept WFMASB %6:vr32bit, %7:vr32bit, %0:fp32bit, implicit $fpc
22+
; CHECK: vr32bit = contract nofpexcept WFMASB_CCPseudo %6:vr32bit, %7:vr32bit, %0:fp32bit, implicit-def dead $cc, implicit $fpc
2323

2424
%arrayidx1 = getelementptr inbounds float, ptr %src, i64 1
2525
%arrayidx2 = getelementptr inbounds float, ptr %src, i64 2
@@ -48,10 +48,10 @@ define void @f1(double %A, ptr %src, ptr %dst) {
4848
; CHECK-LABEL: bb.0 (%ir-block.0):
4949
; CHECK: %3:vr64bit = VL64 [[ADDR1:%[0-9]+:addr64bit]], 8, $noreg :: (load (s64) from %ir.arrayidx1)
5050
; CHECK-NEXT: %4:vr64bit = VL64 %1:addr64bit, 16, $noreg :: (load (s64) from %ir.arrayidx2)
51-
; CHECK-NEXT: vr64bit = contract nofpexcept WFMADB killed %3:vr64bit, killed %4:vr64bit, %0:fp64bit, implicit $fpc
51+
; CHECK-NEXT: vr64bit = contract nofpexcept WFMADB_CCPseudo killed %3:vr64bit, killed %4:vr64bit, %0:fp64bit, implicit-def dead $cc, implicit $fpc
5252
; CHECK: %6:vr64bit = VL64 %1:addr64bit, 24, $noreg :: (load (s64) from %ir.arrayidx3)
5353
; CHECK-NEXT: %7:vr64bit = VL64 %1:addr64bit, 32, $noreg :: (load (s64) from %ir.arrayidx4)
54-
; CHECK-NEXT: %8:vr64bit = contract nofpexcept WFMADB %6:vr64bit, %7:vr64bit, %0:fp64bit, implicit $fpc
54+
; CHECK-NEXT: %8:vr64bit = contract nofpexcept WFMADB_CCPseudo %6:vr64bit, %7:vr64bit, %0:fp64bit, implicit-def dead $cc, implicit $fpc
5555
; CHECK-NEXT: VST64 killed %8:vr64bit, %2:addr64bit, 0, $noreg :: (volatile store (s64) into %ir.dst)
5656
; CHECK-NEXT: VST64 %6:vr64bit, %2:addr64bit, 0, $noreg :: (volatile store (s64) into %ir.dst)
5757
; CHECK-NEXT: VST64 %7:vr64bit, %2:addr64bit, 0, $noreg :: (volatile store (s64) into %ir.dst)
@@ -60,7 +60,7 @@ define void @f1(double %A, ptr %src, ptr %dst) {
6060
; CHECK-NEXT: # Machine code for function f1: IsSSA, TracksLiveness
6161
; CHECK-LABEL: bb.0 (%ir-block.0):
6262
; CHECK: fp64bit = nofpexcept MADB %0:fp64bit(tied-def 0), killed %4:fp64bit, [[ADDR1]], 8, $noreg, implicit $fpc :: (load (s64) from %ir.arrayidx1)
63-
; CHECK: vr64bit = contract nofpexcept WFMADB %6:vr64bit, %7:vr64bit, %0:fp64bit, implicit $fpc
63+
; CHECK: vr64bit = contract nofpexcept WFMADB_CCPseudo %6:vr64bit, %7:vr64bit, %0:fp64bit, implicit-def dead $cc, implicit $fpc
6464

6565
%arrayidx1 = getelementptr inbounds double, ptr %src, i64 1
6666
%arrayidx2 = getelementptr inbounds double, ptr %src, i64 2

‎llvm/test/CodeGen/SystemZ/machine-combiner-reassoc-fp-03.ll

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -17,15 +17,15 @@ define double @fun0_fma2_add(ptr %x, double %A, double %B) {
1717
; CHECK-NEXT: %5:vr64bit = VL64 %0:addr64bit, 16, $noreg :: (load (s64) from %ir.arrayidx2)
1818
; CHECK-NEXT: %6:vr64bit = VL64 %0:addr64bit, 24, $noreg :: (load (s64) from %ir.arrayidx4)
1919
; CHECK-NEXT: %7:vr64bit = {{.*}} WFADB_CCPseudo [[X]], [[Y]]
20-
; CHECK-NEXT: %8:vr64bit = {{.*}} WFMADB killed [[M21:%3:vr64bit]], killed [[M22:%4:vr64bit]], killed %7:vr64bit
21-
; CHECK-NEXT: %9:vr64bit = {{.*}} WFMADB killed [[M31:%5:vr64bit]], killed [[M32:%6:vr64bit]], killed %8:vr64bit
20+
; CHECK-NEXT: %8:vr64bit = {{.*}} WFMADB_CCPseudo killed [[M21:%3:vr64bit]], killed [[M22:%4:vr64bit]], killed %7:vr64bit
21+
; CHECK-NEXT: %9:vr64bit = {{.*}} WFMADB_CCPseudo killed [[M31:%5:vr64bit]], killed [[M32:%6:vr64bit]], killed %8:vr64bit
2222
; CHECK-NEXT: $f0d = COPY %9:vr64bit
2323
; CHECK-NEXT: Return implicit $f0d
2424

2525
; CHECK: # *** IR Dump After Machine InstCombiner (machine-combiner) ***:
2626
; CHECK-NEXT: # Machine code for function fun0_fma2_add: IsSSA, TracksLiveness
27-
; CHECK: %10:vr64bit = {{.*}} WFMADB killed [[M21]], killed [[M22]], [[X]]
28-
; CHECK-NEXT: %11:vr64bit = {{.*}} WFMADB killed [[M31]], killed [[M32]], [[Y]]
27+
; CHECK: %10:vr64bit = {{.*}} WFMADB_CCPseudo killed [[M21]], killed [[M22]], [[X]]
28+
; CHECK-NEXT: %11:vr64bit = {{.*}} WFMADB_CCPseudo killed [[M31]], killed [[M32]], [[Y]]
2929
; CHECK-NEXT: %9:vr64bit = {{.*}} WFADB_CCPseudo %10:vr64bit, %11:vr64bit
3030
; CHECK-NEXT: $f0d = COPY %9:vr64bit
3131
; CHECK-NEXT: Return implicit $f0d
@@ -65,8 +65,8 @@ define double @fun1_fma2_add_divop(ptr %x, double %A, double %B) {
6565
; CHECK-NEXT: %6:vr64bit = VL64 %0:addr64bit, 24, $noreg :: (load (s64) from %ir.arrayidx4)
6666
; CHECK-NEXT: %7:vr64bit = nofpexcept WFDDB %5:vr64bit, killed %6:vr64bit, implicit $fpc
6767
; CHECK-NEXT: %8:vr64bit = {{.*}} WFADB_CCPseudo %1:fp64bit, %2:fp64bit
68-
; CHECK-NEXT: %9:vr64bit = {{.*}} WFMADB killed %3:vr64bit, killed %4:vr64bit, killed %8:vr64bit
69-
; CHECK-NEXT: %10:vr64bit = {{.*}} WFMADB %5:vr64bit, killed %7:vr64bit, killed %9:vr64bit
68+
; CHECK-NEXT: %9:vr64bit = {{.*}} WFMADB_CCPseudo killed %3:vr64bit, killed %4:vr64bit, killed %8:vr64bit
69+
; CHECK-NEXT: %10:vr64bit = {{.*}} WFMADB_CCPseudo %5:vr64bit, killed %7:vr64bit, killed %9:vr64bit
7070
; CHECK-NEXT: $f0d = COPY %10:vr64bit
7171
; CHECK-NEXT: Return implicit $f0d
7272
entry:

‎llvm/test/CodeGen/SystemZ/machine-combiner-reassoc-fp-04.ll

Lines changed: 9 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -17,15 +17,15 @@ define double @fun0_fma2_divop(ptr %x) {
1717
; CHECK-NEXT: [[M11:%3:vr64bit]] = VL64 %0:addr64bit, 16, $noreg :: (load (s64) from %ir.arrayidx2)
1818
; CHECK-NEXT: [[M12:%4:vr64bit]] = VL64 %0:addr64bit, 24, $noreg :: (load (s64) from %ir.arrayidx4)
1919
; CHECK-NEXT: [[DIV:%5:vr64bit]] = nofpexcept WFDDB %3:vr64bit, %4:vr64bit, implicit $fpc
20-
; CHECK-NEXT: %6:vr64bit = {{.*}} WFMADB killed [[M21]], killed [[M22]], killed [[DIV]]
21-
; CHECK-NEXT: %7:vr64bit = {{.*}} WFMADB [[M11]], [[M12]], killed %6:vr64bit
20+
; CHECK-NEXT: %6:vr64bit = {{.*}} WFMADB_CCPseudo killed [[M21]], killed [[M22]], killed [[DIV]]
21+
; CHECK-NEXT: %7:vr64bit = {{.*}} WFMADB_CCPseudo [[M11]], [[M12]], killed %6:vr64bit
2222
; CHECK-NEXT: $f0d = COPY %7:vr64bit
2323
; CHECK-NEXT: Return implicit $f0d
2424

2525
; CHECK: # *** IR Dump After Machine InstCombiner (machine-combiner) ***:
2626
; CHECK-NEXT: # Machine code for function fun0_fma2_divop: IsSSA, TracksLiveness
2727
; CHECK: %8:vr64bit = {{.*}} WFMDB killed [[M21]], killed [[M22]]
28-
; CHECK-NEXT: %9:vr64bit = {{.*}} WFMADB [[M11]], [[M12]], %8:vr64bit
28+
; CHECK-NEXT: %9:vr64bit = {{.*}} WFMADB_CCPseudo [[M11]], [[M12]], %8:vr64bit
2929
; CHECK-NEXT: %7:vr64bit = {{.*}} WFADB_CCPseudo killed [[DIV]], %9:vr64bit
3030
entry:
3131
%arrayidx1 = getelementptr inbounds double, ptr %x, i64 1
@@ -59,8 +59,8 @@ define double @fun1_fma2(ptr %x, double %Arg) {
5959
; CHECK-NEXT: %3:vr64bit = VL64 %0:addr64bit, 8, $noreg :: (load (s64) from %ir.arrayidx1)
6060
; CHECK-NEXT: %4:vr64bit = VL64 %0:addr64bit, 16, $noreg :: (load (s64) from %ir.arrayidx2)
6161
; CHECK-NEXT: %5:vr64bit = VL64 %0:addr64bit, 24, $noreg :: (load (s64) from %ir.arrayidx4)
62-
; CHECK-NEXT: %6:vr64bit = {{.*}} WFMADB killed %2:vr64bit, killed %3:vr64bit, %1:fp64bit
63-
; CHECK-NEXT: %7:vr64bit = {{.*}} WFMADB killed %4:vr64bit, killed %5:vr64bit, killed %6:vr64bit
62+
; CHECK-NEXT: %6:vr64bit = {{.*}} WFMADB_CCPseudo killed %2:vr64bit, killed %3:vr64bit, %1:fp64bit
63+
; CHECK-NEXT: %7:vr64bit = {{.*}} WFMADB_CCPseudo killed %4:vr64bit, killed %5:vr64bit, killed %6:vr64bit
6464
; CHECK-NEXT: $f0d = COPY %7:vr64bit
6565
; CHECK-NEXT: Return implicit $f0d
6666
entry:
@@ -94,13 +94,13 @@ define double @fun2_fma2(ptr %x) {
9494
; CHECK-NEXT: %3:vr64bit = VL64 %0:addr64bit, 16, $noreg :: (load (s64) from %ir.arrayidx2)
9595
; CHECK-NEXT: %4:vr64bit = VL64 %0:addr64bit, 24, $noreg :: (load (s64) from %ir.arrayidx4)
9696
; CHECK-NEXT: [[DIV:%5:vr64bit]] = nofpexcept WFDDB %3:vr64bit, %4:vr64bit, implicit $fpc
97-
; CHECK-NEXT: %6:vr64bit = {{.*}} WFMADB killed %1:vr64bit, killed [[DIV]], killed %2:vr64bit
98-
; CHECK-NEXT: %7:vr64bit = {{.*}} WFMADB %3:vr64bit, %4:vr64bit, killed %6:vr64bit
97+
; CHECK-NEXT: %6:vr64bit = {{.*}} WFMADB_CCPseudo killed %1:vr64bit, killed [[DIV]], killed %2:vr64bit
98+
; CHECK-NEXT: %7:vr64bit = {{.*}} WFMADB_CCPseudo %3:vr64bit, %4:vr64bit, killed %6:vr64bit
9999

100100
; CHECK: # *** IR Dump After Machine InstCombiner (machine-combiner) ***:
101101
; CHECK-NEXT: # Machine code for function fun2_fma2: IsSSA, TracksLiveness
102-
; CHECK: %12:vr64bit = {{.*}} WFMADB %3:vr64bit, %4:vr64bit, killed %2:vr64bit
103-
; CHECK-NEXT: %7:vr64bit = {{.*}} WFMADB killed %1:vr64bit, killed [[DIV]], %12:vr64bit
102+
; CHECK: %12:vr64bit = {{.*}} WFMADB_CCPseudo %3:vr64bit, %4:vr64bit, killed %2:vr64bit
103+
; CHECK-NEXT: %7:vr64bit = {{.*}} WFMADB_CCPseudo killed %1:vr64bit, killed [[DIV]], %12:vr64bit
104104

105105
entry:
106106
%arrayidx1 = getelementptr inbounds double, ptr %x, i64 1

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