@@ -1326,14 +1326,14 @@ class Base_DS_Real_gfx6_gfx7_gfx10_gfx11_gfx12<bits<8> op, DS_Pseudo ps, int ef,
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// GFX12.
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//===----------------------------------------------------------------------===//
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- multiclass DS_Real_gfx12<bits<8> op, string name = !tolower(NAME), bit needAlias = true > {
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+ multiclass DS_Real_gfx12<bits<8> op, string name = !tolower(NAME)> {
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defvar ps = !cast<DS_Pseudo>(NAME);
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let AssemblerPredicate = isGFX12Plus in {
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let DecoderNamespace = "GFX12" in
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def _gfx12 :
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Base_DS_Real_gfx6_gfx7_gfx10_gfx11_gfx12<op, ps, SIEncodingFamily.GFX12,
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name, /*hasGDS=*/false>;
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- if !and(needAlias, ! ne(ps.Mnemonic, name) ) then
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+ if !ne(ps.Mnemonic, name) then
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def : AMDGPUMnemonicAlias<ps.Mnemonic, name>;
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} // End AssemblerPredicate
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}
@@ -1362,7 +1362,7 @@ defm DS_LOAD_TR16_B128 : DS_Real_gfx12<0x0fc>;
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defm DS_LOAD_TR8_B64 : DS_Real_gfx12<0x0fd>;
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defm DS_BVH_STACK_RTN_B32 : DS_Real_gfx12<0x0e0,
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- "ds_bvh_stack_push4_pop1_rtn_b32", true >;
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+ "ds_bvh_stack_push4_pop1_rtn_b32">;
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defm DS_BVH_STACK_PUSH8_POP1_RTN_B32 : DS_Real_gfx12<0x0e1>;
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defm DS_BVH_STACK_PUSH8_POP2_RTN_B64 : DS_Real_gfx12<0x0e2>;
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