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1 parent ccf824b commit ca68507Copy full SHA for ca68507
llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
@@ -95,8 +95,8 @@ char SILowerSGPRSpillsLegacy::ID = 0;
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INITIALIZE_PASS_BEGIN(SILowerSGPRSpillsLegacy, DEBUG_TYPE,
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"SI lower SGPR spill instructions", false, false)
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INITIALIZE_PASS_DEPENDENCY(LiveIntervalsWrapperPass)
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-INITIALIZE_PASS_DEPENDENCY(VirtRegMapWrapperLegacy)
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INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass)
+INITIALIZE_PASS_DEPENDENCY(SlotIndexesWrapperPass)
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INITIALIZE_PASS_END(SILowerSGPRSpillsLegacy, DEBUG_TYPE,
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