clang format.

Author: matinraayai

llvm/lib/CodeGen/CodeGenCommonTMImpl.cpp

@@ -10,9 +10,9 @@
 ///
 //===----------------------------------------------------------------------===//
 
+#include "llvm/CodeGen/CodeGenCommonTMImpl.h"
 #include "llvm/CodeGen/AsmPrinter.h"
 #include "llvm/CodeGen/BasicTTIImpl.h"
-#include "llvm/CodeGen/CodeGenCommonTMImpl.h"
 #include "llvm/CodeGen/MachineModuleInfo.h"
 #include "llvm/CodeGen/Passes.h"
 #include "llvm/CodeGen/TargetPassConfig.h"
@@ -62,8 +62,8 @@ void CodeGenCommonTMImpl::initAsmInfo() {
   // we'll crash later.
   // Provide the user with a useful error message about what's wrong.
   assert(TmpAsmInfo && "MCAsmInfo not initialized. "
-         "Make sure you include the correct TargetSelect.h"
-         "and that InitializeAllTargetMCs() is being invoked!");
+                       "Make sure you include the correct TargetSelect.h"
+                       "and that InitializeAllTargetMCs() is being invoked!");
 
   if (Options.BinutilsVersion.first > 0)
     TmpAsmInfo->setBinutilsVersion(Options.BinutilsVersion);

llvm/lib/CodeGen/TargetPassConfig.cpp

@@ -574,8 +574,7 @@ TargetPassConfig::getStartStopInfo(PassInstrumentationCallbacks &PIC) {
 
 // Out of line constructor provides default values for pass options and
 // registers all common codegen passes.
-TargetPassConfig::TargetPassConfig(TargetMachine &TM,
-                                   PassManagerBase &PM)
+TargetPassConfig::TargetPassConfig(TargetMachine &TM, PassManagerBase &PM)
     : ImmutablePass(ID), PM(&PM), TM(&TM) {
   Impl = new PassConfigImpl();
 

llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp

@@ -1010,7 +1010,7 @@ namespace {
 class GCNPassConfig final : public AMDGPUPassConfig {
 public:
   GCNPassConfig(TargetMachine &TM, PassManagerBase &PM)
-    : AMDGPUPassConfig(TM, PM) {
+      : AMDGPUPassConfig(TM, PM) {
     // It is necessary to know the register usage of the entire call graph.  We
     // allow calls without EnableAMDGPUFunctionCalls if they are marked
     // noinline, so this is always required.

llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp

@@ -209,8 +209,8 @@ bool NVPTXAsmPrinter::lowerImageHandleOperand(const MachineInstr *MI,
 
 void NVPTXAsmPrinter::lowerImageHandleSymbol(unsigned Index, MCOperand &MCOp) {
   // Ewwww
-  TargetMachine &TM = const_cast<TargetMachine&>(MF->getTarget());
-  NVPTXTargetMachine &nvTM = static_cast<NVPTXTargetMachine&>(TM);
+  TargetMachine &TM = const_cast<TargetMachine &>(MF->getTarget());
+  NVPTXTargetMachine &nvTM = static_cast<NVPTXTargetMachine &>(TM);
   const NVPTXMachineFunctionInfo *MFI = MF->getInfo<NVPTXMachineFunctionInfo>();
   const char *Sym = MFI->getImageHandleSymbol(Index);
   StringRef SymName = nvTM.getStrPool().save(Sym);

llvm/lib/Target/PowerPC/PPCTargetMachine.cpp

@@ -356,9 +356,9 @@ PPCTargetMachine::PPCTargetMachine(const Target &T, const Triple &TT,
                                    std::optional<CodeModel::Model> CM,
                                    CodeGenOptLevel OL, bool JIT)
     : CodeGenCommonTMImpl(T, getDataLayoutString(TT), TT, CPU,
-                        computeFSAdditions(FS, OL, TT), Options,
-                        getEffectiveRelocModel(TT, RM),
-                        getEffectivePPCCodeModel(TT, CM, JIT), OL),
+                          computeFSAdditions(FS, OL, TT), Options,
+                          getEffectiveRelocModel(TT, RM),
+                          getEffectivePPCCodeModel(TT, CM, JIT), OL),
       TLOF(createTLOF(getTargetTriple())),
       TargetABI(computeTargetABI(TT, Options)),
       Endianness(isLittleEndianTriple(TT) ? Endian::LITTLE : Endian::BIG) {

llvm/unittests/CodeGen/GlobalISel/GISelMITest.cpp

@@ -66,8 +66,7 @@ body: |
       .toNullTerminatedStringRef(S);
 }
 
-std::unique_ptr<TargetMachine>
-AMDGPUGISelMITest::createTargetMachine() const {
+std::unique_ptr<TargetMachine> AMDGPUGISelMITest::createTargetMachine() const {
   Triple TargetTriple("amdgcn-amd-amdhsa");
   std::string Error;
   const Target *T = TargetRegistry::lookupTarget("", TargetTriple, Error);

llvm/unittests/CodeGen/LexicalScopesTest.cpp

@@ -6,8 +6,8 @@
 //
 //===----------------------------------------------------------------------===//
 
-#include "llvm/CodeGen/CodeGenCommonTMImpl.h"
 #include "llvm/CodeGen/LexicalScopes.h"
+#include "llvm/CodeGen/CodeGenCommonTMImpl.h"
 #include "llvm/CodeGen/MachineBasicBlock.h"
 #include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/CodeGen/MachineInstr.h"

llvm/unittests/CodeGen/MachineBasicBlockTest.cpp

@@ -6,8 +6,8 @@
 //
 //===----------------------------------------------------------------------===//
 
-#include "llvm/CodeGen/CodeGenCommonTMImpl.h"
 #include "llvm/CodeGen/MachineBasicBlock.h"
+#include "llvm/CodeGen/CodeGenCommonTMImpl.h"
 #include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/CodeGen/MachineInstr.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"

llvm/unittests/CodeGen/MachineInstrTest.cpp

@@ -6,8 +6,8 @@
 //
 //===----------------------------------------------------------------------===//
 
-#include "llvm/CodeGen/CodeGenCommonTMImpl.h"
 #include "llvm/CodeGen/MachineInstr.h"
+#include "llvm/CodeGen/CodeGenCommonTMImpl.h"
 #include "llvm/CodeGen/MachineBasicBlock.h"
 #include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"

llvm/unittests/CodeGen/MachineOperandTest.cpp

@@ -6,9 +6,9 @@
 //
 //===----------------------------------------------------------------------===//
 
-#include "llvm/CodeGen/CodeGenCommonTMImpl.h"
 #include "llvm/CodeGen/MachineOperand.h"
 #include "llvm/ADT/ilist_node.h"
+#include "llvm/CodeGen/CodeGenCommonTMImpl.h"
 #include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/CodeGen/MachineModuleInfo.h"
 #include "llvm/CodeGen/TargetFrameLowering.h"

llvm/unittests/MI/LiveIntervalTest.cpp

@@ -57,8 +57,7 @@ std::unique_ptr<TargetMachine> createTargetMachine() {
 std::unique_ptr<Module> parseMIR(LLVMContext &Context,
                                  legacy::PassManagerBase &PM,
                                  std::unique_ptr<MIRParser> &MIR,
-                                 const TargetMachine &TM,
-                                 StringRef MIRCode) {
+                                 const TargetMachine &TM, StringRef MIRCode) {
   SMDiagnostic Diagnostic;
   std::unique_ptr<MemoryBuffer> MBuffer = MemoryBuffer::getMemBuffer(MIRCode);
   MIR = createMIRParser(std::move(MBuffer), Context);

llvm/unittests/Target/LoongArch/InstSizes.cpp

@@ -42,8 +42,8 @@ std::unique_ptr<LoongArchInstrInfo> createInstrInfo(TargetMachine *TM) {
 /// the \p InputMIRSnippet (global variables etc)
 /// Inspired by AArch64
 void runChecks(
-    TargetMachine *TM, LoongArchInstrInfo *II,
-    const StringRef InputIRSnippet, const StringRef InputMIRSnippet,
+    TargetMachine *TM, LoongArchInstrInfo *II, const StringRef InputIRSnippet,
+    const StringRef InputMIRSnippet,
     std::function<void(LoongArchInstrInfo &, MachineFunction &)> Checks) {
   LLVMContext Context;