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[RISCV] Replace TU with Policy in tablegen class name. NFC
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llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td

Lines changed: 17 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -4197,16 +4197,16 @@ class VPatBinaryMaskPolicy<string intrinsic_name,
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(op2_type op2_kind:$rs2),
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(mask_type V0), GPR:$vl, sew, (XLenVT timm:$policy))>;
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4200-
class VPatBinaryMaskTARoundingMode<string intrinsic_name,
4201-
string inst,
4202-
ValueType result_type,
4203-
ValueType op1_type,
4204-
ValueType op2_type,
4205-
ValueType mask_type,
4206-
int sew,
4207-
VReg result_reg_class,
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VReg op1_reg_class,
4209-
DAGOperand op2_kind> :
4200+
class VPatBinaryMaskPolicyRoundingMode<string intrinsic_name,
4201+
string inst,
4202+
ValueType result_type,
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ValueType op1_type,
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ValueType op2_type,
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ValueType mask_type,
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int sew,
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VReg result_reg_class,
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VReg op1_reg_class,
4209+
DAGOperand op2_kind> :
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Pat<(result_type (!cast<Intrinsic>(intrinsic_name#"_mask")
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(result_type result_reg_class:$merge),
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(op1_type op1_reg_class:$rs1),
@@ -4720,9 +4720,9 @@ multiclass VPatBinaryRoundingMode<string intrinsic,
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DAGOperand op2_kind> {
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def : VPatBinaryNoMaskTURoundingMode<intrinsic, inst, result_type, op1_type, op2_type,
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sew, result_reg_class, op1_reg_class, op2_kind>;
4723-
def : VPatBinaryMaskTARoundingMode<intrinsic, inst, result_type, op1_type, op2_type,
4724-
mask_type, sew, result_reg_class, op1_reg_class,
4725-
op2_kind>;
4723+
def : VPatBinaryMaskPolicyRoundingMode<intrinsic, inst, result_type, op1_type, op2_type,
4724+
mask_type, sew, result_reg_class, op1_reg_class,
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op2_kind>;
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}
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multiclass VPatBinaryMSwapped<string intrinsic,
@@ -5094,10 +5094,10 @@ multiclass VPatBinaryW_WV_RM<string intrinsic, string instruction,
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Wti.Vector, Vti.Vector, Vti.Mask,
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Vti.Log2SEW, Wti.RegClass, Vti.RegClass>;
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}
5097-
def : VPatBinaryMaskTARoundingMode<intrinsic, name,
5098-
Wti.Vector, Wti.Vector, Vti.Vector, Vti.Mask,
5099-
Vti.Log2SEW, Wti.RegClass,
5100-
Wti.RegClass, Vti.RegClass>;
5097+
def : VPatBinaryMaskPolicyRoundingMode<intrinsic, name,
5098+
Wti.Vector, Wti.Vector, Vti.Vector, Vti.Mask,
5099+
Vti.Log2SEW, Wti.RegClass,
5100+
Wti.RegClass, Vti.RegClass>;
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}
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}
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}

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