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[SelectionDAG] Add space-optimized forms of OPC_EmitCopyToReg (#73293)
These new opcodes implicitly indicate the RecNo. The old `OPC_EmitCopyToReg2` is renamed to `OPC_EmitCopyToRegTwoByte`. Overall this reduces the llc binary size with all in-tree targets by about 33K (most are from RISCV target).
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3 files changed

+31
-6
lines changed

3 files changed

+31
-6
lines changed

llvm/include/llvm/CodeGen/SelectionDAGISel.h

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -210,7 +210,15 @@ class SelectionDAGISel : public MachineFunctionPass {
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OPC_EmitMergeInputChains1_1,
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OPC_EmitMergeInputChains1_2,
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OPC_EmitCopyToReg,
213+
OPC_EmitCopyToReg0,
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OPC_EmitCopyToReg1,
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OPC_EmitCopyToReg2,
216+
OPC_EmitCopyToReg3,
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OPC_EmitCopyToReg4,
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OPC_EmitCopyToReg5,
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OPC_EmitCopyToReg6,
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OPC_EmitCopyToReg7,
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OPC_EmitCopyToRegTwoByte,
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OPC_EmitNodeXForm,
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OPC_EmitNode,
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// Space-optimized forms that implicitly encode number of result VTs.

llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp

Lines changed: 14 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -3649,11 +3649,22 @@ void SelectionDAGISel::SelectCodeCommon(SDNode *NodeToMatch,
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}
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case OPC_EmitCopyToReg:
3652-
case OPC_EmitCopyToReg2: {
3653-
unsigned RecNo = MatcherTable[MatcherIndex++];
3652+
case OPC_EmitCopyToReg0:
3653+
case OPC_EmitCopyToReg1:
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case OPC_EmitCopyToReg2:
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case OPC_EmitCopyToReg3:
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case OPC_EmitCopyToReg4:
3657+
case OPC_EmitCopyToReg5:
3658+
case OPC_EmitCopyToReg6:
3659+
case OPC_EmitCopyToReg7:
3660+
case OPC_EmitCopyToRegTwoByte: {
3661+
unsigned RecNo =
3662+
Opcode >= OPC_EmitCopyToReg0 && Opcode <= OPC_EmitCopyToReg7
3663+
? Opcode - OPC_EmitCopyToReg0
3664+
: MatcherTable[MatcherIndex++];
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assert(RecNo < RecordedNodes.size() && "Invalid EmitCopyToReg");
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unsigned DestPhysReg = MatcherTable[MatcherIndex++];
3656-
if (Opcode == OPC_EmitCopyToReg2)
3667+
if (Opcode == OPC_EmitCopyToRegTwoByte)
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DestPhysReg |= MatcherTable[MatcherIndex++] << 8;
36583669

36593670
if (!InputChain.getNode())

llvm/utils/TableGen/DAGISelMatcherEmitter.cpp

Lines changed: 9 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -767,14 +767,20 @@ EmitMatcher(const Matcher *N, const unsigned Indent, unsigned CurrentIdx,
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const auto *C2RMatcher = cast<EmitCopyToRegMatcher>(N);
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int Bytes = 3;
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const CodeGenRegister *Reg = C2RMatcher->getDestPhysReg();
770+
unsigned Slot = C2RMatcher->getSrcSlot();
770771
if (Reg->EnumValue > 255) {
771772
assert(isUInt<16>(Reg->EnumValue) && "not handled");
772-
OS << "OPC_EmitCopyToReg2, " << C2RMatcher->getSrcSlot() << ", "
773+
OS << "OPC_EmitCopyToRegTwoByte, " << Slot << ", "
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<< "TARGET_VAL(" << getQualifiedName(Reg->TheDef) << "),\n";
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++Bytes;
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} else {
776-
OS << "OPC_EmitCopyToReg, " << C2RMatcher->getSrcSlot() << ", "
777-
<< getQualifiedName(Reg->TheDef) << ",\n";
777+
if (Slot < 8) {
778+
OS << "OPC_EmitCopyToReg" << Slot << ", "
779+
<< getQualifiedName(Reg->TheDef) << ",\n";
780+
--Bytes;
781+
} else
782+
OS << "OPC_EmitCopyToReg, " << Slot << ", "
783+
<< getQualifiedName(Reg->TheDef) << ",\n";
778784
}
779785

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return Bytes;

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