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[AMDGPU][R600] Move R600TargetMachine into R600CodeGenPassBuilder(NFC).
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7 files changed

+187
-220
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7 files changed

+187
-220
lines changed

‎llvm/lib/Target/AMDGPU/AMDGPUCodeGenPassBuilder.cpp

Lines changed: 1 addition & 1 deletion
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@@ -32,8 +32,8 @@
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#include "GCNSchedStrategy.h"
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#include "GCNVOPDUtils.h"
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#include "R600.h"
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#include "R600CodeGenPassBuilder.h"
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#include "R600MachineFunctionInfo.h"
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#include "R600TargetMachine.h"
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#include "SIFixSGPRCopies.h"
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#include "SIMachineFunctionInfo.h"
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#include "SIMachineScheduler.h"

‎llvm/lib/Target/AMDGPU/CMakeLists.txt

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Original file line numberDiff line numberDiff line change
@@ -137,7 +137,6 @@ add_llvm_target(AMDGPUCodeGen
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R600Packetizer.cpp
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R600RegisterInfo.cpp
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R600Subtarget.cpp
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R600TargetMachine.cpp
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R600TargetTransformInfo.cpp
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SIAnnotateControlFlow.cpp
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SIFixSGPRCopies.cpp

‎llvm/lib/Target/AMDGPU/R600CodeGenPassBuilder.cpp

Lines changed: 148 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -5,12 +5,159 @@
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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/// \file
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/// This file contains both AMDGPU-R600 target machine and the CodeGen pass
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/// builder. The target machine contains all of the hardware specific
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/// information needed to emit code for R600 GPUs and the CodeGen pass builder
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/// handles the same for new pass manager infrastructure.
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//
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//===----------------------------------------------------------------------===//
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#include "R600CodeGenPassBuilder.h"
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#include "R600TargetMachine.h"
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#include "R600.h"
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#include "R600MachineScheduler.h"
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#include "R600TargetTransformInfo.h"
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#include "llvm/Transforms/Scalar.h"
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#include <optional>
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using namespace llvm;
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static cl::opt<bool>
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EnableR600StructurizeCFG("r600-ir-structurize",
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cl::desc("Use StructurizeCFG IR pass"),
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cl::init(true));
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static cl::opt<bool> EnableR600IfConvert("r600-if-convert",
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cl::desc("Use if conversion pass"),
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cl::ReallyHidden, cl::init(true));
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static cl::opt<bool, true> EnableAMDGPUFunctionCallsOpt(
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"amdgpu-function-calls", cl::desc("Enable AMDGPU function call support"),
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cl::location(AMDGPUTargetMachine::EnableFunctionCalls), cl::init(true),
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cl::Hidden);
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static ScheduleDAGInstrs *createR600MachineScheduler(MachineSchedContext *C) {
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return new ScheduleDAGMILive(C, std::make_unique<R600SchedStrategy>());
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}
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static MachineSchedRegistry R600SchedRegistry("r600",
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"Run R600's custom scheduler",
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createR600MachineScheduler);
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//===----------------------------------------------------------------------===//
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// R600 Target Machine (R600 -> Cayman) - Legacy Pass Manager interface.
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//===----------------------------------------------------------------------===//
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R600TargetMachine::R600TargetMachine(const Target &T, const Triple &TT,
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StringRef CPU, StringRef FS,
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const TargetOptions &Options,
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std::optional<Reloc::Model> RM,
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std::optional<CodeModel::Model> CM,
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CodeGenOptLevel OL, bool JIT)
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: AMDGPUTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL) {
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setRequiresStructuredCFG(true);
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// Override the default since calls aren't supported for r600.
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if (EnableFunctionCalls &&
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EnableAMDGPUFunctionCallsOpt.getNumOccurrences() == 0)
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EnableFunctionCalls = false;
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}
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const TargetSubtargetInfo *
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R600TargetMachine::getSubtargetImpl(const Function &F) const {
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StringRef GPU = getGPUName(F);
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StringRef FS = getFeatureString(F);
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SmallString<128> SubtargetKey(GPU);
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SubtargetKey.append(FS);
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auto &I = SubtargetMap[SubtargetKey];
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if (!I) {
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// This needs to be done before we create a new subtarget since any
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// creation will depend on the TM and the code generation flags on the
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// function that reside in TargetOptions.
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resetTargetOptions(F);
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I = std::make_unique<R600Subtarget>(TargetTriple, GPU, FS, *this);
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}
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return I.get();
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}
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TargetTransformInfo
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R600TargetMachine::getTargetTransformInfo(const Function &F) const {
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return TargetTransformInfo(R600TTIImpl(this, F));
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}
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namespace {
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class R600PassConfig final : public AMDGPUPassConfig {
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public:
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R600PassConfig(LLVMTargetMachine &TM, PassManagerBase &PM)
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: AMDGPUPassConfig(TM, PM) {}
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ScheduleDAGInstrs *
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createMachineScheduler(MachineSchedContext *C) const override {
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return createR600MachineScheduler(C);
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}
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bool addPreISel() override;
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bool addInstSelector() override;
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void addPreRegAlloc() override;
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void addPreSched2() override;
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void addPreEmitPass() override;
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};
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} // namespace
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//===----------------------------------------------------------------------===//
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// R600 Legacy Pass Setup
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//===----------------------------------------------------------------------===//
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bool R600PassConfig::addPreISel() {
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AMDGPUPassConfig::addPreISel();
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if (EnableR600StructurizeCFG)
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addPass(createStructurizeCFGPass());
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return false;
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}
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bool R600PassConfig::addInstSelector() {
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addPass(createR600ISelDag(getAMDGPUTargetMachine(), getOptLevel()));
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return false;
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}
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void R600PassConfig::addPreRegAlloc() { addPass(createR600VectorRegMerger()); }
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void R600PassConfig::addPreSched2() {
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addPass(createR600EmitClauseMarkers());
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if (EnableR600IfConvert)
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addPass(&IfConverterID);
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addPass(createR600ClauseMergePass());
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}
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void R600PassConfig::addPreEmitPass() {
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addPass(createR600MachineCFGStructurizerPass());
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addPass(createR600ExpandSpecialInstrsPass());
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addPass(&FinalizeMachineBundlesID);
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addPass(createR600Packetizer());
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addPass(createR600ControlFlowFinalizer());
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}
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TargetPassConfig *R600TargetMachine::createPassConfig(PassManagerBase &PM) {
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return new R600PassConfig(*this, PM);
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}
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Error R600TargetMachine::buildCodeGenPipeline(
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ModulePassManager &MPM, raw_pwrite_stream &Out, raw_pwrite_stream *DwoOut,
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CodeGenFileType FileType, const CGPassBuilderOption &Opts,
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PassInstrumentationCallbacks *PIC) {
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R600CodeGenPassBuilder CGPB(*this, Opts, PIC);
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return CGPB.buildPipeline(MPM, Out, DwoOut, FileType);
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}
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//===----------------------------------------------------------------------===//
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// R600 Target Machine (R600 -> Cayman)
159+
//===----------------------------------------------------------------------===//
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R600CodeGenPassBuilder::R600CodeGenPassBuilder(
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R600TargetMachine &TM, const CGPassBuilderOption &Opts,
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PassInstrumentationCallbacks *PIC)

‎llvm/lib/Target/AMDGPU/R600CodeGenPassBuilder.h

Lines changed: 37 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -9,12 +9,48 @@
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#ifndef LLVM_LIB_TARGET_AMDGPU_R600CODEGENPASSBUILDER_H
1010
#define LLVM_LIB_TARGET_AMDGPU_R600CODEGENPASSBUILDER_H
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12+
#include "AMDGPUCodeGenPassBuilder.h"
13+
#include "R600Subtarget.h"
1214
#include "llvm/MC/MCStreamer.h"
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#include "llvm/Passes/CodeGenPassBuilder.h"
16+
#include "llvm/Target/TargetMachine.h"
17+
#include <optional>
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1519
namespace llvm {
1620

17-
class R600TargetMachine;
21+
//===----------------------------------------------------------------------===//
22+
// R600 Target Machine (R600 -> Cayman) - For Legacy Pass Manager.
23+
//===----------------------------------------------------------------------===//
24+
25+
class R600TargetMachine final : public AMDGPUTargetMachine {
26+
private:
27+
mutable StringMap<std::unique_ptr<R600Subtarget>> SubtargetMap;
28+
29+
public:
30+
R600TargetMachine(const Target &T, const Triple &TT, StringRef CPU,
31+
StringRef FS, const TargetOptions &Options,
32+
std::optional<Reloc::Model> RM,
33+
std::optional<CodeModel::Model> CM, CodeGenOptLevel OL,
34+
bool JIT);
35+
36+
TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
37+
38+
Error buildCodeGenPipeline(ModulePassManager &MPM, raw_pwrite_stream &Out,
39+
raw_pwrite_stream *DwoOut,
40+
CodeGenFileType FileType,
41+
const CGPassBuilderOption &Opt,
42+
PassInstrumentationCallbacks *PIC) override;
43+
44+
const TargetSubtargetInfo *getSubtargetImpl(const Function &) const override;
45+
46+
TargetTransformInfo getTargetTransformInfo(const Function &F) const override;
47+
48+
bool isMachineVerifierClean() const override { return false; }
49+
50+
MachineFunctionInfo *
51+
createMachineFunctionInfo(BumpPtrAllocator &Allocator, const Function &F,
52+
const TargetSubtargetInfo *STI) const override;
53+
};
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1955
class R600CodeGenPassBuilder
2056
: public CodeGenPassBuilder<R600CodeGenPassBuilder, R600TargetMachine> {

‎llvm/lib/Target/AMDGPU/R600ISelLowering.cpp

Lines changed: 1 addition & 2 deletions
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@@ -14,11 +14,10 @@
1414
#include "R600ISelLowering.h"
1515
#include "AMDGPU.h"
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#include "MCTargetDesc/R600MCTargetDesc.h"
17+
#include "R600CodeGenPassBuilder.h"
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#include "R600Defines.h"
18-
#include "R600InstrInfo.h"
1919
#include "R600MachineFunctionInfo.h"
2020
#include "R600Subtarget.h"
21-
#include "R600TargetMachine.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/IR/IntrinsicsAMDGPU.h"
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#include "llvm/IR/IntrinsicsR600.h"

‎llvm/lib/Target/AMDGPU/R600TargetMachine.cpp

Lines changed: 0 additions & 154 deletions
This file was deleted.

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