[LLVM][AArch64]CFINV - Add UNPREDICTABLE behaviour if CRm is not zero

Now CFINV follows AXFLAGS behaviour for CRm.

It looks like (0) in the instruction encoding means that the behaviour is
UNPREDICTABLE if that bit is not zero.

Author: CarolineConcatto

llvm/lib/Target/AArch64/AArch64InstrInfo.td

@@ -2096,6 +2096,7 @@ def FJCVTZS  : BaseFPToIntegerUnscaled<0b01, 0b11, 0b110, FPR64, GPR32,
 let Predicates = [HasFlagM], Defs = [NZCV], Uses = [NZCV] in {
 def CFINV : SimpleSystemI<0, (ins), "cfinv", "">, Sched<[WriteSys]> {
   let Inst{20-5} = 0b0000001000000000;
+  let Unpredictable{11-8} = 0b1111;
 }
 def SETF8  : BaseFlagManipulation<0, 0, (ins GPR32:$Rn), "setf8", "{\t$Rn}">;
 def SETF16 : BaseFlagManipulation<0, 1, (ins GPR32:$Rn), "setf16", "{\t$Rn}">;

llvm/test/MC/Disassembler/AArch64/armv8.4a-flag.txt

@@ -2,10 +2,12 @@
 # RUN: llvm-mc -triple aarch64-none-linux-gnu -mattr=+v8r --disassemble < %s | FileCheck %s
 
 [0x1f,0x40,0x00,0xd5]
+[0x1f,0x4f,0x00,0xd5]
 [0x2d,0x08,0x00,0x3a]
 [0x2d,0x48,0x00,0x3a]
 [0x2f,0x84,0x1f,0xba]
 
+#CHECK:  cfinv
 #CHECK:  cfinv
 #CHECK:  setf8  w1
 #CHECK:  setf16  w1