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Address review comment
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llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -22750,7 +22750,7 @@ SDValue DAGCombiner::scalarizeExtractedVectorLoad(SDNode *EVE, EVT InVecVT,
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/// Transform a vector binary operation into a scalar binary operation by moving
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/// the math/logic after an extract element of a vector.
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static SDValue scalarizeExtractedBinOp(SDNode *ExtElt, SelectionDAG &DAG,
22753-
const SDLoc &DL) {
22753+
const SDLoc &DL, bool LegalTypes) {
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const TargetLowering &TLI = DAG.getTargetLoweringInfo();
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SDValue Vec = ExtElt->getOperand(0);
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SDValue Index = ExtElt->getOperand(1);
@@ -22761,7 +22761,8 @@ static SDValue scalarizeExtractedBinOp(SDNode *ExtElt, SelectionDAG &DAG,
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return SDValue();
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EVT ResVT = ExtElt->getValueType(0);
22764-
if (Opc == ISD::SETCC && ResVT != Vec.getValueType().getVectorElementType())
22764+
if (Opc == ISD::SETCC &&
22765+
(ResVT != Vec.getValueType().getVectorElementType() || LegalTypes))
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return SDValue();
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// Targets may want to avoid this to prevent an expensive register transfer.
@@ -23024,7 +23025,7 @@ SDValue DAGCombiner::visitEXTRACT_VECTOR_ELT(SDNode *N) {
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}
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}
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23027-
if (SDValue BO = scalarizeExtractedBinOp(N, DAG, DL))
23028+
if (SDValue BO = scalarizeExtractedBinOp(N, DAG, DL, LegalTypes))
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return BO;
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if (VecVT.isScalableVector())

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