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fixup! [AMDGPU] - Add address space for strided buffers
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6 files changed

+35
-23
lines changed

6 files changed

+35
-23
lines changed

‎clang/lib/Basic/Targets/AMDGPU.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -32,7 +32,8 @@ static const char *const DataLayoutStringR600 =
3232

3333
static const char *const DataLayoutStringAMDGCN =
3434
"e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32"
35-
"-p7:160:256:256:32-p8:128:128-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128"
35+
"-p7:160:256:256:32-p8:128:128-p9:192:256:256:32-i64:64-v16:16-v24:32-v32:"
36+
"32-v48:64-v96:128"
3637
"-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1"
3738
"-ni:7:8:9";
3839

‎clang/test/CodeGen/target-data.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -176,12 +176,12 @@
176176

177177
// RUN: %clang_cc1 -triple amdgcn-unknown -target-cpu hawaii -o - -emit-llvm %s \
178178
// RUN: | FileCheck %s -check-prefix=R600SI
179-
// R600SI: target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-p7:160:256:256:32-p8:128:128-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1-ni:7:8:9"
179+
// R600SI: target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-p7:160:256:256:32-p8:128:128-p9:192:256:256:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1-ni:7:8:9"
180180

181181
// Test default -target-cpu
182182
// RUN: %clang_cc1 -triple amdgcn-unknown -o - -emit-llvm %s \
183183
// RUN: | FileCheck %s -check-prefix=R600SIDefault
184-
// R600SIDefault: target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-p7:160:256:256:32-p8:128:128-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1-ni:7:8:9"
184+
// R600SIDefault: target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-p7:160:256:256:32-p8:128:128-p9:192:256:256:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1-ni:7:8:9"
185185

186186
// RUN: %clang_cc1 -triple arm64-unknown -o - -emit-llvm %s | \
187187
// RUN: FileCheck %s -check-prefix=AARCH64

‎clang/test/CodeGenOpenCL/amdgpu-env-amdgcn.cl

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
// RUN: %clang_cc1 %s -O0 -triple amdgcn -emit-llvm -o - | FileCheck %s
22
// RUN: %clang_cc1 %s -O0 -triple amdgcn---opencl -emit-llvm -o - | FileCheck %s
33

4-
// CHECK: target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-p7:160:256:256:32-p8:128:128-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1-ni:7:8:9"
4+
// CHECK: target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-p7:160:256:256:32-p8:128:128-p9:192:256:256:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1-ni:7:8:9"
55
void foo(void) {}

‎llvm/lib/IR/AutoUpgrade.cpp

Lines changed: 7 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -5207,17 +5207,21 @@ std::string llvm::UpgradeDataLayoutString(StringRef DL, StringRef TT) {
52075207
// This goes before adding new address spaces to prevent incoherent string
52085208
// values.
52095209
if (!DL.contains("-ni") && !DL.starts_with("ni"))
5210-
Res.append("-ni:7:8");
5211-
// Update ni:7 to ni:7:8.
5210+
Res.append("-ni:7:8:9");
5211+
// Update ni:7 to ni:7:8:9.
52125212
if (DL.ends_with("ni:7"))
5213-
Res.append(":8");
5213+
Res.append(":8:9");
5214+
if (DL.ends_with("ni:7:8"))
5215+
Res.append(":9");
52145216

52155217
// Add sizing for address spaces 7 and 8 (fat raw buffers and buffer
52165218
// resources) An empty data layout has already been upgraded to G1 by now.
52175219
if (!DL.contains("-p7") && !DL.starts_with("p7"))
52185220
Res.append("-p7:160:256:256:32");
52195221
if (!DL.contains("-p8") && !DL.starts_with("p8"))
52205222
Res.append("-p8:128:128");
5223+
if (!DL.contains("-p9") && !DL.startswith("p9"))
5224+
Res.append("-p9:192:256:256:32");
52215225

52225226
return Res;
52235227
}

‎llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -538,7 +538,8 @@ static StringRef computeDataLayout(const Triple &TT) {
538538
// space 8) which cannot be non-trivilally accessed by LLVM memory operations
539539
// like getelementptr.
540540
return "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32"
541-
"-p7:160:256:256:32-p8:128:128-i64:64-v16:16-v24:32-v32:32-v48:64-v96:"
541+
"-p7:160:256:256:32-p8:128:128-p9:192:256:256:32-i64:64-v16:16-v24:32-"
542+
"v32:32-v48:64-v96:"
542543
"128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-"
543544
"G1-ni:7:8:9";
544545
}

‎llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp

Lines changed: 21 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -33,10 +33,12 @@ TEST(DataLayoutUpgradeTest, ValidDataLayoutUpgrade) {
3333
// Check that AMDGPU targets add -G1 if it's not present.
3434
EXPECT_EQ(UpgradeDataLayoutString("e-p:32:32", "r600"), "e-p:32:32-G1");
3535
// and that ANDGCN adds p7 and p8 as well.
36-
EXPECT_EQ(UpgradeDataLayoutString("e-p:64:64", "amdgcn"),
37-
"e-p:64:64-G1-ni:7:8:9-p7:160:256:256:32-p8:128:128");
38-
EXPECT_EQ(UpgradeDataLayoutString("e-p:64:64-G1", "amdgcn"),
39-
"e-p:64:64-G1-ni:7:8:9-p7:160:256:256:32-p8:128:128");
36+
EXPECT_EQ(
37+
UpgradeDataLayoutString("e-p:64:64", "amdgcn"),
38+
"e-p:64:64-G1-ni:7:8:9-p7:160:256:256:32-p8:128:128-p9:192:256:256:32");
39+
EXPECT_EQ(
40+
UpgradeDataLayoutString("e-p:64:64-G1", "amdgcn"),
41+
"e-p:64:64-G1-ni:7:8:9-p7:160:256:256:32-p8:128:128-p9:192:256:256:32");
4042
// but that r600 does not.
4143
EXPECT_EQ(UpgradeDataLayoutString("e-p:32:32-G1", "r600"), "e-p:32:32-G1");
4244

@@ -50,7 +52,8 @@ TEST(DataLayoutUpgradeTest, ValidDataLayoutUpgrade) {
5052
"amdgcn"),
5153
"e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-"
5254
"v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:"
53-
"1024-v2048:2048-n32:64-S32-A5-G1-ni:7:8:9-p7:160:256:256:32-p8:128:128");
55+
"1024-v2048:2048-n32:64-S32-A5-G1-ni:7:8:9-p7:160:256:256:32-p8:128:128-"
56+
"p9:192:256:256:32");
5457

5558
// Check that RISCV64 upgrades -n64 to -n32:64.
5659
EXPECT_EQ(UpgradeDataLayoutString("e-m:e-p:64:64-i64:64-i128:128-n64-S128",
@@ -80,20 +83,23 @@ TEST(DataLayoutUpgradeTest, NoDataLayoutUpgrade) {
8083
// Check that AMDGPU targets don't add -G1 if there is already a -G flag.
8184
EXPECT_EQ(UpgradeDataLayoutString("e-p:32:32-G2", "r600"), "e-p:32:32-G2");
8285
EXPECT_EQ(UpgradeDataLayoutString("G2", "r600"), "G2");
83-
EXPECT_EQ(UpgradeDataLayoutString("e-p:64:64-G2", "amdgcn"),
84-
"e-p:64:64-G2-ni:7:8-p7:160:256:256:32-p8:128:128");
85-
EXPECT_EQ(UpgradeDataLayoutString("G2-e-p:64:64", "amdgcn"),
86-
"G2-e-p:64:64-ni:7:8-p7:160:256:256:32-p8:128:128");
87-
EXPECT_EQ(UpgradeDataLayoutString("e-p:64:64-G0", "amdgcn"),
88-
"e-p:64:64-G0-ni:7:8-p7:160:256:256:32-p8:128:128");
86+
EXPECT_EQ(
87+
UpgradeDataLayoutString("e-p:64:64-G2", "amdgcn"),
88+
"e-p:64:64-G2-ni:7:8:9-p7:160:256:256:32-p8:128:128-p9:192:256:256:32");
89+
EXPECT_EQ(
90+
UpgradeDataLayoutString("G2-e-p:64:64", "amdgcn"),
91+
"G2-e-p:64:64-ni:7:8:9-p7:160:256:256:32-p8:128:128-p9:192:256:256:32");
92+
EXPECT_EQ(
93+
UpgradeDataLayoutString("e-p:64:64-G0", "amdgcn"),
94+
"e-p:64:64-G0-ni:7:8:9-p7:160:256:256:32-p8:128:128-p9:192:256:256:32");
8995

9096
// Check that AMDGCN targets don't add already declared address space 7.
9197
EXPECT_EQ(UpgradeDataLayoutString("e-p:64:64-p7:64:64", "amdgcn"),
92-
"e-p:64:64-p7:64:64-G1-ni:7:8:9-p8:128:128");
98+
"e-p:64:64-p7:64:64-G1-ni:7:8:9-p8:128:128-p9:192:256:256:32");
9399
EXPECT_EQ(UpgradeDataLayoutString("p7:64:64-G2-e-p:64:64", "amdgcn"),
94-
"p7:64:64-G2-e-p:64:64-ni:7:8-p8:128:128");
100+
"p7:64:64-G2-e-p:64:64-ni:7:8:9-p8:128:128-p9:192:256:256:32");
95101
EXPECT_EQ(UpgradeDataLayoutString("e-p:64:64-p7:64:64-G1", "amdgcn"),
96-
"e-p:64:64-p7:64:64-G1-ni:7:8:9-p8:128:128");
102+
"e-p:64:64-p7:64:64-G1-ni:7:8:9-p8:128:128-p9:192:256:256:32");
97103
}
98104

99105
TEST(DataLayoutUpgradeTest, EmptyDataLayout) {
@@ -106,7 +112,7 @@ TEST(DataLayoutUpgradeTest, EmptyDataLayout) {
106112
// Check that AMDGPU targets add G1 if it's not present.
107113
EXPECT_EQ(UpgradeDataLayoutString("", "r600"), "G1");
108114
EXPECT_EQ(UpgradeDataLayoutString("", "amdgcn"),
109-
"G1-ni:7:8:9-p7:160:256:256:32-p8:128:128");
115+
"G1-ni:7:8:9-p7:160:256:256:32-p8:128:128-p9:192:256:256:32");
110116
}
111117

112118
} // end namespace

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