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[AArch64][VE][X86] Use getSignedTargetConstant. NFC
1 parent e59582b commit ce0cc8e

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5 files changed

+8
-13
lines changed

5 files changed

+8
-13
lines changed

llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -920,8 +920,7 @@ bool AArch64DAGToDAGISel::SelectRDVLImm(SDValue N, SDValue &Imm) {
920920
if ((MulImm % std::abs(Scale)) == 0) {
921921
int64_t RDVLImm = MulImm / Scale;
922922
if ((RDVLImm >= Low) && (RDVLImm <= High)) {
923-
Imm = CurDAG->getSignedConstant(RDVLImm, SDLoc(N), MVT::i32,
924-
/*isTarget=*/true);
923+
Imm = CurDAG->getSignedTargetConstant(RDVLImm, SDLoc(N), MVT::i32);
925924
return true;
926925
}
927926
}
@@ -4283,7 +4282,7 @@ bool AArch64DAGToDAGISel::SelectSVESignedArithImm(SDValue N, SDValue &Imm) {
42834282
int64_t ImmVal = CNode->getSExtValue();
42844283
SDLoc DL(N);
42854284
if (ImmVal >= -128 && ImmVal < 128) {
4286-
Imm = CurDAG->getSignedConstant(ImmVal, DL, MVT::i32, /*isTarget=*/true);
4285+
Imm = CurDAG->getSignedTargetConstant(ImmVal, DL, MVT::i32);
42874286
return true;
42884287
}
42894288
}

llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -9299,8 +9299,7 @@ AArch64TargetLowering::LowerCall(CallLoweringInfo &CLI,
92999299
// Each tail call may have to adjust the stack by a different amount, so
93009300
// this information must travel along with the operation for eventual
93019301
// consumption by emitEpilogue.
9302-
Ops.push_back(
9303-
DAG.getSignedConstant(FPDiff, DL, MVT::i32, /*isTarget=*/true));
9302+
Ops.push_back(DAG.getSignedTargetConstant(FPDiff, DL, MVT::i32));
93049303
}
93059304

93069305
if (CLI.PAI) {

llvm/lib/Target/VE/VEInstrInfo.td

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -44,8 +44,8 @@ def ULO7 : SDNodeXForm<imm, [{
4444
SDLoc(N), MVT::i32);
4545
}]>;
4646
def LO7 : SDNodeXForm<imm, [{
47-
return CurDAG->getSignedConstant(SignExtend64(N->getSExtValue(), 7),
48-
SDLoc(N), MVT::i32, /*isTarget=*/true);
47+
return CurDAG->getSignedTargetConstant(SignExtend64(N->getSExtValue(), 7),
48+
SDLoc(N), MVT::i32);
4949
}]>;
5050
def MIMM : SDNodeXForm<imm, [{
5151
return CurDAG->getTargetConstant(val2MImm(getImmVal(N)),

llvm/lib/Target/X86/X86ISelDAGToDAG.cpp

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -313,8 +313,7 @@ namespace {
313313
Disp = CurDAG->getTargetBlockAddress(AM.BlockAddr, MVT::i32, AM.Disp,
314314
AM.SymbolFlags);
315315
else
316-
Disp =
317-
CurDAG->getSignedConstant(AM.Disp, DL, MVT::i32, /*isTarget=*/true);
316+
Disp = CurDAG->getSignedTargetConstant(AM.Disp, DL, MVT::i32);
318317

319318
if (AM.Segment.getNode())
320319
Segment = AM.Segment;
@@ -3775,8 +3774,7 @@ bool X86DAGToDAGISel::foldLoadStoreIntoMemOperand(SDNode *Node) {
37753774
}
37763775

37773776
if (MemVT != MVT::i64 || isInt<32>(OperandV)) {
3778-
Operand = CurDAG->getSignedConstant(OperandV, SDLoc(Node), MemVT,
3779-
/*isTarget=*/true);
3777+
Operand = CurDAG->getSignedTargetConstant(OperandV, SDLoc(Node), MemVT);
37803778
NewOpc = SelectImmOpcode(Opc);
37813779
}
37823780
}

llvm/lib/Target/X86/X86ISelLoweringCall.cpp

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2428,8 +2428,7 @@ X86TargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
24282428
Ops.push_back(Callee);
24292429

24302430
if (isTailCall)
2431-
Ops.push_back(
2432-
DAG.getSignedConstant(FPDiff, dl, MVT::i32, /*isTarget=*/true));
2431+
Ops.push_back(DAG.getSignedTargetConstant(FPDiff, dl, MVT::i32));
24332432

24342433
// Add argument registers to the end of the list so that they are known live
24352434
// into the call.

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